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- I am not familiar with the internals of the ESP32, but if I were doing it on an equivalent PIC32 I'd probably use SPI to generate the clock signal, which I then divide by 2. SPI then generates an interrupt every 8 clocks (or 4 after dividing by 2) which triggers DMA to read from the ADC. Another DMA channel sends out dummy bytes through SPI to keep the clock running and performing enough transactions. I2S relies on an external CODEC chip to do the ADC (and DAC).Majenko– Majenko2020-08-13 11:42:55 +00:00Commented Aug 13, 2020 at 11:42
- @Majenko using SPI for clock generation is a nice idea, I like it! The ESP32's SPI supports 4-bit transmission mode, which seems to be perfect for this. But I still have no idea how I could synchronize the SPI dummy signal with the SH/ICG signals and how I would generate those. Do you think, bitbanging using a timer followed by a call to my dummy SPI transmission (which triggers ADC-DMA) could work?Sim Son– Sim Son2020-08-13 12:31:13 +00:00Commented Aug 13, 2020 at 12:31
- The SPI interrupt could be used to manage those pulses I would think. You could also use it to start / stop the ADC reading DMA channel.Majenko– Majenko2020-08-13 12:32:58 +00:00Commented Aug 13, 2020 at 12:32
- @Majenko concerning I2S: do you mean I2S actually requires external hardware? From what I understand, the ESP32's I2S interface is capable of reading the internal ADC to achieve sampling rates of up to ~300kHz, or am I wrong?Sim Son– Sim Son2020-08-13 12:33:34 +00:00Commented Aug 13, 2020 at 12:33
- As I mentioned earlier, I am not familiar with the internals. They may have added some loopback to an internal CODEC I guess, but I haven't a clue. I've only ever worked with external CODEC chips. You'd have to consult the TRM datasheet.Majenko– Majenko2020-08-13 12:35:00 +00:00Commented Aug 13, 2020 at 12:35
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