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Sep 30, 2022 at 11:12 history edited Simon F CC BY-SA 4.0
added floor func to expression
Sep 27, 2022 at 17:31 comment added user2500 Simon F is right! When trying to conserve space for 3 channels, the 2 x 2 split, r,g,b in 3 of the quarters, the next smaller mip level occupying the 4th quarter, is an elegant way pack everything when limiting mipmapping to square powers of 2. Modern GPUs support rectangular mimaps without power of 2 constraints, but with the constraint that all pixel formats are (likely) to be power of 2 bytes. Addressing constraints align pixels to avoid crossing cache lines; further constraints can cause small mips to waste alot of space, different per generation of HW.
Sep 27, 2022 at 0:38 vote accept Adam Smith
Sep 27, 2022 at 0:38 comment added Adam Smith I just looked at the paper--yes, you're right. I also edited the question to include a reference to the Wikipedia page, that shows this phenomenon. Thanks. I think that this is my answer.
Sep 26, 2022 at 8:19 history answered Simon F CC BY-SA 4.0