I have recently been reading "Constrained Pseudorandom Functions" by Boneh and Waters, and "Constrained Verifiable Random Functions" by Fuchsbauer. One of the claimed results is that, for any circuit $C$, you can constrain a PRF key $k$ into a key $k_C$ such that someone holding $k_C$ will only be able to evaluate the PRF under key $k$ on inputs $x$ such that $C(x)=1$. What the authors definitely show is that you can constrain a PRF to an arbitrary layered, monotone circuit, and then they claim that the result follows for arbitrary circuits. Here is an excerpt from the BW paper:
In addition, like [17] we also build our construction for monotone circuits (limiting ourselves to AND and OR gates); however, we make the standard observation that by pushing NOT gates to the input wires using De Morgan’s law we obtain the same result for general circuits.
There is also the following confusing footnote:
These restrictions are mostly useful for exposition and do not impact functionality. General circuits can be built from non-monotonic circuits. In addition, given a circuit an equivalent layered exists that is larger by at most a polynomial factor
Is the statement "General circuits can be built from non-monotonic circuits" not practically a tautology?
And from the Fuchsbauer one:
Our treatment of circuits follows that by Boneh and Waters [BW13], who adapt the model of Bellare et al. [BHR12]. They consider boolean circuits with a single output gate and require that circuits are layered (where a gate at level j receives its inputs from wires at level j − 1) and monotonic in that they only contain AND and OR gates. This is without loss of generality, since an arbitrary circuit can be transformed into a layered monotonic circuit of polynomially related size.
But anyways, following the reference in the first excerpt to "Attribute-based encryption for circuits from multilinear maps" from Garg, Gentry, Sahai, and Waters, they claim:
We begin by observing that there is a folklore transformation that uses De Mor- gan’s rule to transform any general Boolean circuit into an equivalent monotone Boolean circuit, with negation gates only allowed at the inputs. For complete- ness, we sketch the construction here. Given a Boolean circuit C, consider the Boolean circuit ˜C that computes the negation of C. Note that such a circuit can be generated by simply recursively applying De Morgan’s rule to each gate of C starting at the output gate. The cru- cial property of this transformation is that in this circuit ˜C each wire computes the negation of the corresponding original wire in C. Now, we can construct a monotone circuit M by combining C and ˜C as follows: take each negation gate inside C, eliminate it, and replace the output of the negation gate by the corresponding wire in ˜C. Do the same for negation gates in ˜C, using the wires from C. In the end, this will yield a monotone circuit M with negation gates remaining only at the input level, as desired. The size of M will be no more than twice the original size of C, and the depth of M will be identical to the depth of C, where depth is computed ignoring negation gates. The correctness of this transformation follows trivially from De Morgan’s rule. As a result, we can focus our attention on monotone circuits. Note that inputs to the circuit correspond to boolean variables xi, and we can simply introduce explicit separate attributes corresponding to xi = 0 and xi = 1. Honest encryptors are instructed to only set one of these two attributes for each variable xi. Because of this simple transformation, in the sequel we will only consider ABE for monotone circuits
In the context of ABE, I can buy this argument. But I do not see how this makes any sense for the constrained PRF setting.
So I don't see how the claim that it suffices to build constrained PRFs for monotone circuits is true. The authors don't describe how to make NOT gates, even for just the first level of the circuit. Perhaps I am missing some context in which this restriction is without loss of generality, or I have some misunderstanding of the relationship between monotone circuits and general circuits.
Thanks in advance for your reply,
Franklin