Your Ice = Ibe * Hfe isn't quite right. This equation shows what the collector current could be if given sufficient collector voltage. Saturation happens when you don't give it enough voltage. Therefore, in saturation Ice < Ibe * Hfe. Or you could look at it the other way around, which is that you are supplying more base current than needed to handle all the collector current the circuit can provide. Put mathematically, that is Ibe > Ice/Hfe.

Since the collector of a NPN will act like a current sink and in saturation the external circuit isn't giving it as much current as it could pass, the collector voltage will go as low as it can. A saturated transistor typically has around 200mV C-E, but that also can vary a lot by the design of the transistor and the current.

One artifact of saturation is that the transistor will be slow to turn off. There are extra "unused" charged in the base that take a little while to drain out. That's not very scientific and only roughly described the semiconductor physics, but it's a good enough model to keep in your mind as a first order explanation.

One interesting thing is that the collector of a saturated transistor is actually below the base voltage. This is used to advantage in Schottky logic. A Schottky diode is integrated into the transistor from base to collector. When the collector gets low when it's nearly in saturation, it steals base current which keeps the transistor just at the edge of saturation. The on state voltage will be a little higher since the transistor isn't fully saturated. The advantage is that it makes the off transition faster since the transistor is in the "linear" region instead of in saturation.

Your \$I_{CE}\$ = \$I_{BE} \times h_{FE}\$ isn't quite right. This equation shows what the collector current could be if given sufficient collector voltage. Saturation happens when you don't give it enough voltage. Therefore, in saturation, \$I_{CE} \lt I_{BE} \times h_{FE}\$. Or you could look at it the other way around, which is that you are supplying more base current than needed to handle all the collector current the circuit can provide. Put mathematically, that is \$I_{BE} \gt I_{CE} \mathbin{/} h_{FE}\$.

Since the collector of a NPN will act like a current sink and in saturation the external circuit isn't giving it as much current as it could pass, the collector voltage will go as low as it can. A saturated transistor typically has around 200mV C-E, but that also can vary a lot by the design of the transistor and the current.

One artifact of saturation is that the transistor will be slow to turn off. There are extra "unused" charges in the base that take a little while to drain out. That's not very scientific and only roughly described the semiconductor physics, but it's a good enough model to keep in your mind as a first order explanation.

One interesting thing is that the collector of a saturated transistor is actually below the base voltage. This is used to advantage in Schottky logic. A Schottky diode is integrated into the transistor from base to collector. When the collector gets low when it's nearly in saturation, it steals base current which keeps the transistor just at the edge of saturation. The on state voltage will be a little higher since the transistor isn't fully saturated. The advantage is that it makes the off transition faster since the transistor is in the "linear" region instead of in saturation.

Your Ice = Ibe * Hfe isn't quite right. This equation shows what the collector current could be if given sufficient collector voltage. Saturation happens when you don't give it enough voltage. Therefore, in saturation Ice < Ibe * Hfe. Or you could look at it the other way around, which is that you are supplying more base current than needed to handle all the collector current the circuit can provide. Put mathematically, that is Ibe > Ice/Hfe.

Since the collector of a NPN will act like a current sink and in saturation the external circuit isn't giving it as much current as it could pass, the collector voltage will go as low as it can. A saturated transistor typically has around 200mV C-E, but that also can vary a lot by the design of the transistor and the current.

One artifact of saturation is that the transistor will be slow to turn off. There are extra "unused" charged in the base that take a little while to drain out. That's not very scientific and only roughly described the semiconductor physics, but it's a good enough model to keep in your mind as a first order explanation.

One interesting thing is that the collector of a saturated transistor is actually below the base voltage. This is used to advantage in Schottkey logic. A Schottkey diode is integrated into the transistor from base to collector. When the collector gets low when it's nearly in saturation, it steals base current which keeps the transistor just at the edge of saturation. The on state voltage will be a little higher since the transistor isn't fully saturated. The advantage is that it makes the off transition faster since the transistor is in the "linear" region instead of in saturation.

Your Ice = Ibe * Hfe isn't quite right. This equation shows what the collector current could be if given sufficient collector voltage. Saturation happens when you don't give it enough voltage. Therefore, in saturation Ice < Ibe * Hfe. Or you could look at it the other way around, which is that you are supplying more base current than needed to handle all the collector current the circuit can provide. Put mathematically, that is Ibe > Ice/Hfe.

Since the collector of a NPN will act like a current sink and in saturation the external circuit isn't giving it as much current as it could pass, the collector voltage will go as low as it can. A saturated transistor typically has around 200mV C-E, but that also can vary a lot by the design of the transistor and the current.

One artifact of saturation is that the transistor will be slow to turn off. There are extra "unused" charged in the base that take a little while to drain out. That's not very scientific and only roughly described the semiconductor physics, but it's a good enough model to keep in your mind as a first order explanation.

One interesting thing is that the collector of a saturated transistor is actually below the base voltage. This is used to advantage in Schottky logic. A Schottky diode is integrated into the transistor from base to collector. When the collector gets low when it's nearly in saturation, it steals base current which keeps the transistor just at the edge of saturation. The on state voltage will be a little higher since the transistor isn't fully saturated. The advantage is that it makes the off transition faster since the transistor is in the "linear" region instead of in saturation.