Timeline for Cycle counting with modern CPUs (e.g. ARM)
Current License: CC BY-SA 3.0
5 events
| when toggle format | what | by | license | comment | |
|---|---|---|---|---|---|
| Jul 8, 2011 at 18:55 | vote | accept | supercat | ||
| Jul 7, 2011 at 15:21 | comment | added | supercat | ...and then arrange DMA to transfer that, or what would be the best approach? | |
| Jul 7, 2011 at 15:20 | comment | added | supercat | In any case, with regard to one of the first applications I was pondering for precise cycle-banging, I posted more information in the original question. I'm curious what you think. Another situation where I was pondering cycle-banging would be blasting display data to a color LCD. The data would be buffered in RAM using 8-bit colors, but the display needs 16-bit colors. The fastest way I'd thought of to output data would have been to use hardware to generate the write strobes, so the CPU would only have to clock out data. Would it be good to translate 8->16 bit into a small buffer... | |
| Jul 7, 2011 at 15:14 | comment | added | supercat | I like the DMA notion. I don't think the Cortex M3 core has any DMA, though--that's a function of individual manufacturers' chips, and they all seem to implement it differently. One thing I find irksome with at least the one implementation I've actually played with (STM32L152), is that I can't find any way to have a pin strobe when DMA data is output. It's also not clear what factors may affect DMA timeliness. | |
| Jul 6, 2011 at 16:37 | history | answered | BarsMonster | CC BY-SA 3.0 |