Timeline for purpose of diode in this 555 timer application
Current License: CC BY-SA 3.0
9 events
| when toggle format | what | by | license | comment | |
|---|---|---|---|---|---|
| Jul 13, 2012 at 9:59 | comment | added | jacks | @stevenh- Well, thanks for admiration. I'm just working things out. :) | |
| Jul 13, 2012 at 9:27 | comment | added | stevenvh | Wow, surely this is becoming the longest answer ever on EE. When does the book come out? :-) Anyway, I admire your perseverance in this, keeping my fingers crossed. Success! | |
| Jul 13, 2012 at 9:19 | history | edited | jacks | CC BY-SA 3.0 | added 2301 characters in body |
| Jul 13, 2012 at 2:41 | comment | added | jacks | @TonyStewart - The i/p is driven from Open Collector/Open Drain. But may be Totem-pole TTL or CMOS. This circuit is actually needed to enable a specified functionality on ckt. That functionality can only be enabled when we get a HIGH on pin#3 and this functionality will be available till pin#3 remains HIGH. The pin#3 is driving TTL logic. | |
| Jul 13, 2012 at 2:33 | history | edited | jacks | CC BY-SA 3.0 | added 432 characters in body |
| Jul 12, 2012 at 14:47 | comment | added | Tony Stewart EE since 1975 | latest schema 2hrs ago seems to work but I think there is a simpler solution that satisfies the glitch problem you may not want. ( pulse stretcher on output.) Can you also define input logic O.C. or push-pull CMOS? and function for this circuit is what? | |
| Jul 12, 2012 at 12:20 | history | edited | jacks | CC BY-SA 3.0 | added 458 characters in body |
| Jul 12, 2012 at 11:53 | history | edited | jacks | CC BY-SA 3.0 | added 286 characters in body |
| Jul 12, 2012 at 11:46 | history | answered | jacks | CC BY-SA 3.0 |