Timeline for If I need to find an MOSFET spice model with a particular length and width, where do I start?
Current License: CC BY-SA 4.0
13 events
| when toggle format | what | by | license | comment | |
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| Mar 15, 2019 at 15:07 | comment | added | Edgar Brown | @userP520 I added a somewhat more official (at least much more than just a random forum) TSMC 0.18µm set of models to my answer. These are not vendor models but models for a very specific wafer lot from an academic run. I am not sure how Berkeley justifies this through their NDA with MOSIS, but clearly this is necessary for academic use. In academia these MOSIS files are rather widely disseminated. | |
| Mar 15, 2019 at 14:28 | vote | accept | user P520 | ||
| Mar 15, 2019 at 14:27 | vote | accept | user P520 | ||
| Mar 15, 2019 at 14:28 | |||||
| Mar 15, 2019 at 14:01 | history | edited | user P520 | CC BY-SA 4.0 | deleted 1672 characters in body |
| Mar 15, 2019 at 14:00 | comment | added | user P520 | I found this model online on a forum. I believe it could have been a sample model. To be safe, I can remove it @Justin | |
| Mar 15, 2019 at 12:58 | comment | added | Justin | I'm pretty sure it violates the terms of the TSMC license to post their models online | |
| Mar 15, 2019 at 12:37 | answer | added | Edgar Brown | timeline score: 1 | |
| Mar 15, 2019 at 12:14 | answer | added | Elliot Alderson | timeline score: 1 | |
| Mar 15, 2019 at 11:33 | comment | added | analogsystemsrf | MU * Cox is the K (the amps/volt^2). You have the Tox, so the Cox is just math. At 100/36, you have many picoFarads of gate-channel capacitance. Assume 50 uA/volt^2 at the K for a sub-0.25 micron Nchannel. At 1uA, you will be approx 1/15 volts above threshold (Ve = 0.06). Is this adequately low, to be in subtheshold. At 10 nanoAmps, you will be approx 6 milliVolts above threshold. Using W/L = 3. | |
| Mar 15, 2019 at 4:05 | comment | added | user P520 | @EdgarBrown I added the level 49 nmos I am using right now. | |
| Mar 15, 2019 at 4:03 | history | edited | user P520 | CC BY-SA 4.0 | added link to current nmos model |
| Mar 15, 2019 at 3:54 | comment | added | Edgar Brown | You need to be much more specific. There are several dozens of spice model types (aka “levels”) and each one of those provides some support for multiple ranges and types of variation. If all the transistors are in the same technology, the more elaborate models are designed to properly scale with transistor size. | |
| Mar 15, 2019 at 3:44 | history | asked | user P520 | CC BY-SA 4.0 |