Timeline for Intuition behind Capacitive reactance?
Current License: CC BY-SA 4.0
6 events
| when toggle format | what | by | license | comment | |
|---|---|---|---|---|---|
| Sep 2, 2020 at 7:43 | history | edited | Andy aka | CC BY-SA 4.0 | added 31 characters in body |
| Sep 1, 2020 at 16:08 | history | edited | Andy aka | CC BY-SA 4.0 | added 112 characters in body |
| Sep 1, 2020 at 16:06 | comment | added | Andy aka | @SalahTheGoat yes, for a sinewave applied voltage, the rate of change of voltage is greatest as the voltage passes through zero hence, this is when the maximum current occurs. Given that the current is also a sinewave, it is shifted forward by 90° from the voltage wave form (i.e. said to lead voltage by 90°) | |
| Sep 1, 2020 at 15:54 | comment | added | SalahTheGoat | Okay this definitely helps a lot. I'm still not at 100% though. So in the case of a capacitor connected to an AC voltage source with absolutely no resistance present (a perfectly ideal circuit assumed), the voltage across the capacitor should always equal the voltage across the source (that is, the voltage provided by the source). Now when the source voltage is at its zero point, it has its max rate of change magnitude \$|\frac{dV}{dt}|\$ and similarly the capacitor will have its maximum \$|\frac{dV}{dt}|\$ . Thus the current should only reach a max when V_source and V_cap are at zero right? | |
| Sep 1, 2020 at 14:50 | history | edited | Andy aka | CC BY-SA 4.0 | added 9 characters in body |
| Sep 1, 2020 at 14:43 | history | answered | Andy aka | CC BY-SA 4.0 |