The impedance of the voltage divider is way to high. If you can't lower the resistances then you should use an op-amp unity gain buffer with a rail-to-rail input and output.

Update:

The data sheet clearly indicates that the external resistance must be less than \$50k\Omega\$.

Table 51 (shown by OP) shows this as well.

With regard to the filter external capacitor, again the data sheet requires the total external capacitance be as small as possible:

Refer in particular to Note 2 of Figure 24 (reproduced below).

Quote: "A high \$C_{\text{parasitic}}\$ will downgrade conversion accuracy."

So the original answer still stands. The impedance is too high.
Now in addition, the capacitance is also too high.

Clearly the resistors were chosen to reduce current consumption. The capacitor is chosen for noise filtering.

If these are important then a buffer amplifier is required. There is a trade -off between of current draw between a lower impedance voltage divider and the quiescent current of the buffer amplifier.

Also from Note 2, the effect of high capacitance "... can be remedied by reducing \$f_{adc}\$". This is to increase the available sampling time based on the number of clock cycles.

Finally, notice the constant current source $I_L|$. They aren't clear on what this is (leakage perhaps) but it will cause a voltage drop across the input resistance further introducing errors.

The impedance of the voltage divider is way to high. If you can't lower the resistances then you should use an op-amp unity gain buffer with a rail-to-rail input and output.

Update:

The data sheet clearly indicates that the external resistance must be less than \$50k\Omega\$.

Table 51 (shown by OP) shows this as well.

With regard to the filter external capacitor, again the data sheet requires the total external capacitance be as small as possible:

Refer in particular to Note 2 of Figure 24 (reproduced below).

Quote: "A high \$C_{\text{parasitic}}\$ will downgrade conversion accuracy."

So the original answer still stands. The impedance is too high.
Now in addition, the capacitance is also too high.

Clearly the resistors were chosen to reduce current consumption. The capacitor is chosen for noise filtering.

If these are important then a buffer amplifier is required. There is a trade -off between of current draw between a lower impedance voltage divider and the quiescent current of the buffer amplifier.

Also from Note 2, the effect of high capacitance "... can be remedied by reducing \$f_{adc}\$". This is to increase the available sampling time based on the number of clock cycles.

Finally, notice the constant current source \$I_L\$. They aren't clear on what this is (leakage perhaps) but it will cause a voltage drop across the input resistance further introducing errors.

The impedance of the voltage divider is way to high. If you can't lower the resistances then you should use an op-amp unity gain buffer with a rail-to-rail input and output.

The impedance of the voltage divider is way to high. If you can't lower the resistances then you should use an op-amp unity gain buffer with a rail-to-rail input and output.

Update:

The data sheet clearly indicates that the external resistance must be less than \$50k\Omega\$.

Table 51 (shown by OP) shows this as well.

With regard to the filter external capacitor, again the data sheet requires the total external capacitance be as small as possible:

Refer in particular to Note 2 of Figure 24 (reproduced below).

Quote: "A high \$C_{\text{parasitic}}\$ will downgrade conversion accuracy."

So the original answer still stands. The impedance is too high.
Now in addition, the capacitance is also too high.

Clearly the resistors were chosen to reduce current consumption. The capacitor is chosen for noise filtering.

If these are important then a buffer amplifier is required. There is a trade -off between of current draw between a lower impedance voltage divider and the quiescent current of the buffer amplifier.

Also from Note 2, the effect of high capacitance "... can be remedied by reducing \$f_{adc}\$". This is to increase the available sampling time based on the number of clock cycles.

Finally, notice the constant current source $I_L|$. They aren't clear on what this is (leakage perhaps) but it will cause a voltage drop across the input resistance further introducing errors.