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Cool, thanks for references to Apple and Intel tech. Is your answer pointing out challenges of managing thread to core affinity? Some cache performance problems are eased because multicore processors may repeat L1 caches per core? For example: software.intel.com/en-us/articles/… High speed cache for four cores with more cache hits can be more than 4x as fast as one core with more cache misses on the same data. Matrix multiplication can. Random scheduling of 32 threads on 4 cores can't. Let's use affinity and get 32 cores.

DeveloperDon
– DeveloperDon

2012-08-20 17:51:39 +00:00
Commented Aug 20, 2012 at 17:51
not really though its the same problem - core affinity just refers to the problem where a task is bounced from core to core. Its the same issue if a task is interrupted, replaced with a new one, then the original task continues on the same core. Intel's saying there: cache hits = fast, cache misses = slow, regardless of the number of cores. I think they're trying to persuade you to buy their chips rather than AMDs :)

gbjbaanb
– gbjbaanb

2012-08-20 18:01:43 +00:00
Commented Aug 20, 2012 at 18:01

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