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/sse3/.) The de-facto standard is that runtime CPU dispatching only needs to check the highest SSE feature flag it depends on.popcnt, but that's good to check explicitly. And other non-SIMD extensions like BMI1 are fully independent of SIMD (although since some BMI1/2 instructions use VEX encoding, they're normally only found on CPUs that support AVX. And unfortunately Intel even disables BMI1/2 on their Pentium/Celeron CPUs, perhaps as a way of fully disabling AVX.).-march=skylake-avx512./lm/will match anything containing those characters). I followed the exhaustive level definitions as used in the first answer (that’s where/ssse3/without/sse3/came from), even though as you say many of them are redundant. (I’ve been following the discussions leading up to the definition of these levels.)