727 Gates

How I did it:

1. turned the code page translation from wikipedia into an appropriately formatted truth table using Excel (15 minutes)
2. minimized the truth table using Espresso (5 minutes, 30 minutes on 1st iteration getting back into the saddle)
3. fed the minimized truth table into a schematic generator (1 minute)
4. iterated on 2&3 until I got a reasonable answer (<1 hour)
5. turned the schematic into an uploadable image (30 min, %$#@! Microsoft)

Here's the 100% NAND gate result:

If I was actually going to implement this, I'd drop the NAND-centric scoring. Building XOR gates out of NANDs is a big waste of transistors. Then I'd start worrying about UMC, fire up the FPGA design tools, maybe break out the HDL manuals, etc. Whew! I love software.

NB, for hobbyists interested in FPGAs, I'll recommend FPGA4fun.

727 Gates

1. turned the code page translation from wikipedia into an appropriately formatted truth table using Excel (15 minutes)
2. minimized the truth table using Espresso (5 minutes, 30 minutes on 1st iteration getting back into the saddle)
3. fed the minimized truth table into a schematic generator (1 minute)
4. iterated on 2&3 until I got a reasonable answer (<1 hour)
5. turned the schematic into an uploadable image (30 min, %$#@! Microsoft)

Here's the 100% NAND gate result:

If I was actually going to implement this, I'd drop the NAND-centric scoring. Building XOR gates out of NANDs is a big waste of transistors. Then I'd start worrying about UMC, fire up the FPGA design tools, maybe break out the HDL manuals, etc. Whew! I love software.

NB, for hobbyists interested in FPGAs, I'll recommend FPGA4fun.