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In addition to Hilmar's good comments in his own answer, see this question which demonstrates why very low cut-off filters are a challenge even in the second-order section structure, when implemented in fixed point. I copied the relevant plot here showing the pattern of pole locations for the classic SOS using any of the Direct Form standard structures:

Note that a filter with a low cutoff relative to the sampling rate will require a pole close to $z=1$ on the z plane inside the unit circle. This is the area in the plot above where the possible pole locations once quantized becomes very sparse. We see that the possible error only increases as the ratio of sampling frequency to cut-off frequency increases- so increasing the sampling rate only makes things worst. That said this is resolved by using even more precision (number of bits) within the filter structure to meet filter performance requirements than we might otherwise expect with typical FIR structures.

The other way around this (assuming the resources used for the number of bits required becomes more of an issue than using more dedicated multipliers) other structures to be considered are the Normal (or Coupled) Form by Rader and Gold, or alternate structures proposed by Agarwal and Burrus.

For low pass filters with cutoffs significantly smaller than the sampling rate, it is often just as efficient to implement the filter as a decimating FIR filter, which also has the benefit of avoiding all the possible issues with IIR filters (instability, quantization noise growth, limit cycles, overflow oscillations, etc). I have demonstrated such an efficiency comparison as well as additional considerations here at this post where a 40 Hz low pass filter running at a 48KHz clock rate was implemented with 8.45 real multiplications per clock cycle (compared to the 15 real multiplications per clock cycle require for the 6th order IIR needed to get the same magnitude response). This comes at the cost of memory storage. As mentioned, the time delay in the demonstrated implementation would be easily resolved for the case of a low pass filter by decimating a minimum phase FIR filter instead of linear phase for the implementation.

In addition to Hilmar's good comments in his own answer, see this question as well as Rick Lyon's interesting blog post which shows similar pole pattern graphs, demonstrating why very low cut-off filters are a challenge even in the second-order section structure, when implemented in fixed point. I copied the relevant plot here showing the pattern of pole locations for the classic SOS using any of the Direct Form standard structures:

Note that a filter with a low cutoff relative to the sampling rate will require a pole close to $z=1$ on the z plane inside the unit circle. This is the area in the plot above where the possible pole locations once quantized becomes very sparse. We see that the possible error only increases as the ratio of sampling frequency to cut-off frequency increases- so increasing the sampling rate only makes things worst. That said this is resolved by using even more precision (number of bits) within the filter structure to meet filter performance requirements than we might otherwise expect with typical FIR structures.

The other way around this (assuming the resources used for the number of bits required becomes more of an issue than using more dedicated multipliers) other structures to be considered are the Normal (or Coupled) Form by Rader and Gold, or alternate structures proposed by Agarwal and Burrus.

For low pass filters with cutoffs significantly smaller than the sampling rate, it is often just as efficient to implement the filter as a decimating FIR filter, which also has the benefit of avoiding all the possible issues with IIR filters (instability, quantization noise growth, limit cycles, overflow oscillations, etc). I have demonstrated such an efficiency comparison as well as additional considerations here at this post where a 40 Hz low pass filter running at a 48KHz clock rate was implemented with 8.45 real multiplications per clock cycle (compared to the 15 real multiplications per clock cycle require for the 6th order IIR needed to get the same magnitude response). This comes at the cost of memory storage. As mentioned, the time delay in the demonstrated implementation would be easily resolved for the case of a low pass filter by decimating a minimum phase FIR filter instead of linear phase for the implementation.

In addition to Hilmar's good comments in his own answer, see this question which demonstrates why very low cut-off filters are a challenge even in the second-order section structure, when implemented in fixed point. I copied the relevant plot here showing the pattern of pole locations for the classic SOS using any of the Direct Form standard structures:

Note that a filter with a low cutoff relative to the sampling rate will require a pole close to $z=1$ on the z plane inside the unit circle. This is the area in the plot above where the possible pole locations once quantized becomes very sparse. We see that the possible error only increases as the ratio of sampling frequency to cut-off frequency increases- so increasing the sampling rate only makes things worst. That said this is resolved by using even more precision (number of bits) within the filter structure to meet filter performance requirements than we might otherwise expect with typical FIR structures.

The other way around this (assuming the resources used for the number of bits required becomes more of an issue than using more dedicated multipliers) other structures to be considered are the Normal (or Coupled) Form by Rader and Gold, or alternate structures proposed by Agarwal and Burrus.

For low pass filters with cutoffs significantly smaller than the sampling rate, it is often just as efficient to implement the filter as a decimating FIR filter, which also has the benefit of avoiding all the possible issues with IIR filters (instability, quantization noise growth, limit cycles, overflow oscillations, etc). I have demonstrated such an efficiency comparison as well as additional considerations here at this post where a 40 Hz low pass filter running at a 48KHz clock rate was implemented with 8.45 real multiplications per clock cycle (compared to the 15 real multiplications per clock cycle require for the 6th order IIR needed to get the same magnitude response). This comes at the cost of memory storage. As mentioned, the time delay in the demonstrated implementation would be easily resolved for the case of a low pass filter by decimating a minimum phase FIR filter instead of linear phase for the implementation.

In addition to Hilmar's good comments in his own answer, see this question which demonstrates why very low cut-off filters are a challenge even in the second-order section structure, when implemented in fixed point. I copied the relevant plot here showing the pattern of pole locations for the classic SOS using any of the Direct Form standard structures:

Note that a filter with a low cutoff relative to the sampling rate will require a pole close to $z=1$ on the z plane inside the unit circle. This is the area in the plot above where the possible pole locations once quantized becomes very sparse. We see that the possible error only increases as the ratio of sampling frequency to cut-off frequency increases- so increasing the sampling rate only makes things worst. That said this is resolved by using even more precision (number of bits) within the filter structure to meet filter performance requirements than we might otherwise expect with typical FIR structures.

The other way around this (assuming the resources used for the number of bits required becomes more of an issue than using more dedicated multipliers) other structures to be considered are the Normal (or Coupled) Form by Rader and Gold, or alternate structures proposed by Agarwal and Burrus.

For low pass filters with cutoffs significantly smaller than the sampling rate, it is often just as efficient to implement the filter as a decimating FIR filter, which also has the benefit of avoiding all the possible issues with IIR filters (instability, quantization noise growth, limit cycles, overflow oscillations, etc). I have demonstrated such an efficiency comparison as well as additional considerations here at this post where a 40 Hz low pass filter running at a 48KHz clock rate was implemented with 8.45 real multiplications per clock cycle (compared to the 15 real multiplications per clock cycle require for the 6th order IIR needed to get the same magnitude response). This comes at the cost of memory storage. As mentioned, the time delay in the demonstrated implementation would be easily resolved for the case of a low pass filter by decimating a minimum phase FIR filter instead of linear phase for the implementation.

In addition to Hilmar's good comments in his own answer, see this question which demonstrates why very low cut-off filters are a challenge even in the second-order section structure, when implemented in fixed point. I copied the relevant plot here showing the pattern of pole locations for the classic SOS using any of the Direct Form standard structures:

Note that a filter with a low cutoff relative to the sampling rate will require a pole close to $z=1$ on the z plane inside the unit circle. This is the area in the plot above where the possible pole locations once quantized becomes very sparse. We see that the possible error only increases as the ratio of sampling frequency to cut-off frequency increases- so increasing the sampling rate only makes things worst. That said this is resolved by using even more precision (number of bits) within the filter structure to meet filter performance requirements than we might otherwise expect with typical FIR structures.

The other way around this (assuming the resources used for the number of bits required becomes more of an issue than using more dedicated multipliers) other structures to be considered are the Normal (or Coupled) Form by Rader and Gold, or alternate structures proposed by Agarwal and Burrus.

For low pass filters with cutoffs significantly smaller than the sampling rate, it is often just as efficient to implement the filter as a decimating FIR filter, which also has the benefit of avoiding all the possible issues with IIR filters (instability, quantization noise growth, limit cycles, overflow oscillations, etc). I have demonstrated such an efficiency comparison as well as additional considerations here at this post.

In addition to Hilmar's good comments in his own answer, see this question which demonstrates why very low cut-off filters are a challenge even in the second-order section structure, when implemented in fixed point. I copied the relevant plot here showing the pattern of pole locations for the classic SOS using any of the Direct Form standard structures:

Note that a filter with a low cutoff relative to the sampling rate will require a pole close to $z=1$ on the z plane inside the unit circle. This is the area in the plot above where the possible pole locations once quantized becomes very sparse. We see that the possible error only increases as the ratio of sampling frequency to cut-off frequency increases- so increasing the sampling rate only makes things worst. That said this is resolved by using even more precision (number of bits) within the filter structure to meet filter performance requirements than we might otherwise expect with typical FIR structures.

The other way around this (assuming the resources used for the number of bits required becomes more of an issue than using more dedicated multipliers) other structures to be considered are the Normal (or Coupled) Form by Rader and Gold, or alternate structures proposed by Agarwal and Burrus.

For low pass filters with cutoffs significantly smaller than the sampling rate, it is often just as efficient to implement the filter as a decimating FIR filter, which also has the benefit of avoiding all the possible issues with IIR filters (instability, quantization noise growth, limit cycles, overflow oscillations, etc). I have demonstrated such an efficiency comparison as well as additional considerations here at this post where a 40 Hz low pass filter running at a 48KHz clock rate was implemented with 8.45 real multiplications per clock cycle (compared to the 15 real multiplications per clock cycle require for the 6th order IIR needed to get the same magnitude response). This comes at the cost of memory storage. As mentioned, the time delay in the demonstrated implementation would be easily resolved for the case of a low pass filter by decimating a minimum phase FIR filter instead of linear phase for the implementation.