Timeline for Having trouble implementing a 1Hz blinking light on a Spartan 6 FPGA
Current License: CC BY-SA 3.0
7 events
| when toggle format | what | by | license | comment | |
|---|---|---|---|---|---|
| Jul 17, 2015 at 0:11 | vote | accept | user279043 | ||
| Jul 8, 2015 at 1:23 | answer | added | Tom Carpenter | timeline score: 3 | |
| Jul 8, 2015 at 1:13 | answer | added | alex.forencich | timeline score: 0 | |
| Jul 8, 2015 at 0:28 | answer | added | davidd | timeline score: 2 | |
| Jul 7, 2015 at 23:14 | comment | added | user16324 | I don't know Verilog, but you shouldn't be using count_next in the expression to generate count_next. That is, exactly as the error message says, a combinatorial loop. I'm pretty sure you meant to use counthere. | |
| Jul 7, 2015 at 22:21 | review | First posts | |||
| Jul 7, 2015 at 23:19 | |||||
| Jul 7, 2015 at 22:21 | history | asked | user279043 | CC BY-SA 3.0 |