Timeline for Build AND logic gate with 74'00 ICs (NAND) in negative logic
Current License: CC BY-SA 3.0
5 events
| when toggle format | what | by | license | comment | |
|---|---|---|---|---|---|
| Oct 22, 2015 at 13:30 | comment | added | user89709 | Thats the schematic for positive logic, so far i got it, my problem is the negative logic thing (true=0, false=1). | |
| Oct 22, 2015 at 13:25 | history | undeleted | KillaKem | ||
| Oct 22, 2015 at 13:25 | history | edited | KillaKem | CC BY-SA 3.0 | deleted 716 characters in body |
| Oct 22, 2015 at 12:58 | history | deleted | KillaKem | via Vote | |
| Oct 22, 2015 at 11:36 | history | answered | KillaKem | CC BY-SA 3.0 |