Timeline for Designing system for multiple SPI and I2C slaves
Current License: CC BY-SA 3.0
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| Nov 3, 2015 at 18:00 | comment | added | gbulmer | @NickAlexeev - interesting point. I think, in the context of questions like this one, I'd still suggest it would be easier to get two SPI device working on separate SPI peripheral interfaces first, then try to combine, rather than try to get them both working sharing the same SPI peripheral interface. But a good point none the less. | |
| Nov 3, 2015 at 3:49 | comment | added | Nick Alexeev | As an aside, an SPI bus can typically work with multiple slaves that require different clock phases (i.e. different SPI modes). The master can change the SPI mode on a transaction-by-transaction basis. When CS# is deasserted for one slave, it ignores the SPI traffic that goes to some other slave, including the "foreign" clock phase. (I have implemented SPI with slaves requiring different modes. Having said that, SPI is more of a custom than a standard, and it's not inconceivable that there are oddball SPI slaves that don't work well with others.) | |
| Oct 26, 2015 at 12:02 | history | answered | gbulmer | CC BY-SA 3.0 |