Timeline for What is the difference between DCM and PLL in e.g. Xilinx FPGA?
Current License: CC BY-SA 3.0
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| Nov 16, 2016 at 10:25 | comment | added | Marcus Müller | @dim stubbornness is one of the strengths commonly found in EEs :) But nevertheless, I can see your point. My problem really is that the document OP links to is a 116p explanation of the clocking ressources on the FPGAs - there's separate chapters that highlight what the DCM and the PLL modules, respectively, do. I can't copy & paste 20p of Xilinx Documentation – so lest OP specifies what she/he needs to do, I'm all out of ideas how to answer the question. | |
| Nov 16, 2016 at 10:15 | comment | added | dim | @MarcusMüller I'm a bit stubborn. I would say it's more like "what's the difference in using a USART vs a UART", which could be answered with "well, if you just need asynchronous communication, you could use both, but USART is, in addition, also able to handle synchronous communications". OP doesn't care about the naming. He cares about what functionalities are provided by both blocks in the Spartan 6, and how are they different. As it is, it seems to me that don't address his concern at all. | |
| Nov 16, 2016 at 10:07 | comment | added | Marcus Müller | @dim love to contradict, here. It's equivalent to "what's the difference in using a hexfet over a field-affected semiconductive junction" and I'd have to ask "For what? and: by the way, hexfet is just a marketing name, and a semiconductor junction is just a part of a MOSFET. But if you need to figure out, compare the datasheets.". (further, more sarcastic analogies "What's the difference between a Lamborghini and a V8", assuming Lamborghini labeled their cares as V8, which is just a motor configuration) | |
| Nov 16, 2016 at 10:04 | comment | added | dim | @MarcusMüller His last sentence: "what is the difference in using a DCM vs. a PLL [...]" is rather clear, I'd say. | |
| Nov 16, 2016 at 9:59 | comment | added | Marcus Müller | @dim but putting the question like that, one would have to ask "for what purpose?", lest OP's question remains unclear. In that case, I took the part of the question that is possible to answer, and explained how to answer the usage question (by comparing specs) himself/herself. | |
| Nov 16, 2016 at 9:53 | comment | added | dim | @MarcusMüller Let's put OP's question differently: in which specific cases should you decide to use a DCM resource vs a PLL resource within the Spartan 6 FPGA (since it has both available)? You don't address this. PLL and DCM may be marketing names, but they both identify different actual blocks available in this FPGA, so they indeed probably have slightly different typical usages. | |
| Nov 16, 2016 at 9:33 | comment | added | Marcus Müller | As I said, it is a marketing name. No discussion necessary. A PLL is just a control loop. | |
| Nov 16, 2016 at 9:24 | comment | added | EquipDev | Thanks for the reply. However, my understanding is that this is more than a marketing naming game, since the Xilinx Spartan-6 has both DCMs and PLLs available. So for this reason, it is probably important to understand the difference, since there may be a good reason for the engineers to implement two different components that may at first glance look like providing similar functionality. | |
| Nov 16, 2016 at 9:15 | history | answered | Marcus Müller | CC BY-SA 3.0 |