Timeline for What is pseudo-open-drain-logic?
Current License: CC BY-SA 4.0
10 events
| when toggle format | what | by | license | comment | |
|---|---|---|---|---|---|
| Jun 16, 2019 at 6:10 | review | Low quality posts | |||
| Jun 17, 2019 at 7:09 | |||||
| S Jun 16, 2019 at 5:44 | history | edited | Tony Stewart EE since 1975 | CC BY-SA 4.0 | Attempted to copy-edit the answer |
| S Jun 16, 2019 at 5:44 | history | suggested | Marc.2377 | CC BY-SA 4.0 | Attempted to copy-edit the answer |
| Jun 16, 2019 at 5:36 | review | Suggested edits | |||
| S Jun 16, 2019 at 5:44 | |||||
| May 10, 2012 at 21:18 | comment | added | Connor Wolf | This answer does not seem to actually address what pseudo open drain logic is at all. It talks a little bit about open drain logic, and then wanders off to talk about other specifics of the planned DDR4 bus. | |
| May 10, 2012 at 2:06 | comment | added | akohlsmith | Bob Pease was a great explainer. Both he and Jim Williams gone in the same week. What a sad time for the industry. RIP. | |
| May 10, 2012 at 0:17 | history | edited | Tony Stewart EE since 1975 | CC BY-SA 3.0 | my last edit |
| May 10, 2012 at 0:12 | history | edited | Tony Stewart EE since 1975 | CC BY-SA 3.0 | added 206 characters in body |
| May 9, 2012 at 23:59 | history | edited | Tony Stewart EE since 1975 | CC BY-SA 3.0 | added 480 characters in body |
| May 9, 2012 at 23:48 | history | answered | Tony Stewart EE since 1975 | CC BY-SA 3.0 |