Timeline for Why aren't my interrupts nested in an ATSAM controller?
Current License: CC BY-SA 3.0
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| Feb 4, 2018 at 11:28 | history | bumped | CommunityBot | This question has answers that may be good or bad; the system has marked it active so that they can be reviewed. | |
| Aug 22, 2017 at 13:04 | review | Close votes | |||
| Sep 7, 2017 at 3:01 | |||||
| Aug 22, 2017 at 12:46 | history | edited | vsz | CC BY-SA 3.0 | added 199 characters in body |
| Aug 22, 2017 at 12:22 | history | edited | vsz | CC BY-SA 3.0 | added 8 characters in body |
| Aug 22, 2017 at 12:20 | comment | added | vsz | @DiBosco : The measurements I posted are the maximum latency, so the worst case. Usually the timer interrupt occurs within 1 to 5 µs of the overflow event. However, from time to time, the interrupt is delayed by approximately 70 µs - the same time the float operations take. And if I do the float operations twice in the SERCOM interrupt, than the delay in the worst case is approximately 140 µs. This indicates that it wasn't interrupted. But if I add an endless loop after the float ops, the worst case latency is still 140 µs! (the loop is not optimized away, I checked) | |
| Aug 22, 2017 at 12:12 | history | edited | vsz | CC BY-SA 3.0 | deleted 391 characters in body; edited title |
| Aug 22, 2017 at 12:11 | comment | added | DiBosco | My guess would be that somehow it's never actually getting interrupted? ie the timing is never right for an interrupt of an interrupt? Is that at all possible? | |
| Aug 22, 2017 at 11:56 | comment | added | vsz | @DiBosco : interestingly, the infinite loop in a lower priority ISR does get interrupted. But then why does it not get interrupted when it's merely doing some calculations for 70 µs? It might seem that preempting an interrupt has such a huge overhead? Anyway, the premise of my question seems flawed, now. | |
| Aug 22, 2017 at 11:37 | comment | added | DiBosco | I think I'd be tempted to put an infinite loop in one ISR then have a higher priority interrupt fired off to prove a point. | |
| Aug 22, 2017 at 11:25 | answer | added | Turbo J | timeline score: 1 | |
| Aug 22, 2017 at 11:18 | history | edited | vsz | CC BY-SA 3.0 | added 68 characters in body |
| Aug 22, 2017 at 11:09 | history | edited | vsz | CC BY-SA 3.0 | added 24 characters in body; edited tags |
| Aug 22, 2017 at 11:08 | answer | added | Tom L. | timeline score: 1 | |
| Aug 22, 2017 at 10:39 | history | edited | vsz | CC BY-SA 3.0 | added 1148 characters in body |
| Aug 22, 2017 at 10:01 | comment | added | vsz | @DiBosco : I will then check my experimental setup again. I tested it with an oscilloscope, a fast interrupt which toggles a portpin, and a slow interrupt which deliberately wastes time with a float division. It was not interrupted. | |
| Aug 22, 2017 at 9:57 | comment | added | DiBosco | Another one that may be useful is this which has another link within it. stackoverflow.com/questions/45789624/… | |
| Aug 22, 2017 at 9:52 | comment | added | DiBosco | electronics.stackexchange.com/questions/74162/… | |
| Aug 22, 2017 at 9:49 | history | asked | vsz | CC BY-SA 3.0 |