In addition to Dave Tweed's answer, SDRAM clock is easier to lay out. Specifically on the clock needs to be "clean". The other control pins can have glitches as long as 1) they don't violate over/undershoot requirements 2) they settle in time to meet the SDRAM's requirements.

In addition to Dave Tweed's answer, SDRAM clock is easier to layout. Specifically only the clock needs to be "clean". The other control pins can have glitches as long as 1) they don't violate over/undershoot requirements 2) they settle in time to meet SDRAM requirements.