Timeline for External Memory IC which increments data on a clock pin
Current License: CC BY-SA 4.0
15 events
| when toggle format | what | by | license | comment | |
|---|---|---|---|---|---|
| Jun 19, 2024 at 1:10 | comment | added | davidcary | @DKNguyen: perhaps a link would be a good addition to your explanation: meta.stackexchange.com/questions/66377/what-is-the-xy-problem | |
| Oct 17, 2019 at 13:18 | comment | added | DKNguyen | @Hart22 an XY problem is when someone asks specifically how to implement a (usually) strange roundabout solution they have come up with because they don't know any better or don't have enough experience to be aware of better alternatives. They are asking how to implement their conceived solution, not how to solve their actual problem. | |
| Oct 17, 2019 at 12:44 | answer | added | Dave Tweed | timeline score: 2 | |
| Oct 17, 2019 at 12:25 | answer | added | CrossRoads | timeline score: 1 | |
| Oct 17, 2019 at 12:06 | answer | added | TonyM | timeline score: 1 | |
| Oct 17, 2019 at 11:45 | review | Close votes | |||
| Nov 3, 2019 at 3:05 | |||||
| Oct 17, 2019 at 11:17 | comment | added | Hart22 | Okay, 10ns change time is fine to be honest. What i'm more interested is in finding the type of chip that can perform this auto increment on an external clock and display on a pin. | |
| Oct 17, 2019 at 11:12 | comment | added | Sorenp | That would be 1/(125*10^6) roughly 8 ns. In my notes on SRAM i have only seen access time as low as 10 ns | |
| Oct 17, 2019 at 11:07 | history | edited | Hart22 | CC BY-SA 4.0 | added 26 characters in body |
| Oct 17, 2019 at 11:06 | comment | added | Hart22 | volatile is fine (added to the question9) Read speeds of 125MSPS or greater I'm pretty sure this can be achieved by FPGA but I want to configure digital chips with embedded software and then let it run. | |
| Oct 17, 2019 at 11:04 | comment | added | Sorenp | What type of speed are we talking ? Are we talking non volatile memory or ?.. | |
| Oct 17, 2019 at 10:58 | comment | added | Hart22 | Unsure what is meant by an XY problem. But I need to have atleast 8 output pins that go to a device, lets say device Z, that are read every clock cycle by device Z and change every clock cycle so that device Z can change its output based on these inputs. | |
| Oct 17, 2019 at 10:53 | comment | added | Hart22 | Can I store data in it? | |
| Oct 17, 2019 at 10:49 | comment | added | Jeroen3 | Why not use a 16 bit counter, eg: SN74LV8154? I also think this is an XY problem, so if you can explain what you actually want to achieve, it might help as well. | |
| Oct 17, 2019 at 10:40 | history | asked | Hart22 | CC BY-SA 4.0 |