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user3219492
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Software Driver for custom AXI IP - utils function missingstream IP in Xilinx SDK

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user3219492
  • 803
  • 4
  • 18

Driver for custom AXI IP - utils function missing

I created an IP (say 'myip') using HLS with AXI-stream input and output. After connecting the IP to Zynq and exporting the bitstream to SDK, header file xmyip.h got generated which had functions like "Xmyip_LookupConfig", "Xmyip_CfgInitialize" etc with which I was able to initialize my IP 'myip' and use the function "XAxiDma_SimpleTransfer" to send AXI-stream input data to/from PL/PS.

But if I create any custom-IP (not HLS, but using Create and Package New-IP under tools), in the same name ('myip'), headerfile myip.h (not xmyip.h like in case of HLS) got generated. And also it has the following functions only

#define MYIP2_mReadReg(BaseAddress, RegOffset) \ Xil_In32((BaseAddress) + (RegOffset)) #define MYIP2_mWriteReg(BaseAddress, RegOffset, Data) \ Xil_Out32((BaseAddress) + (RegOffset), (u32)(Data)) 

There are no util/wrapper functions ("Xmyip_LookupConfig", "Xmyip_CfgInitialize") like in the case of HLS IP to initialize my IP core. How do I proceed in this case?

Regards