I'm taking a digital design course, and I've been told that a NAND gate needs four transistors to implement and an AND gate needs six (four for a NAND gate and two for an inverter). That makes sense until one of my classmates told me he could implement an AND gate with four transistors, much like a NAND gate but with some symmetry. I implement his idea using Logisim (see the image below, the left one is a NAND gate, and the right one is a four-transistor AND gate I think of), and it seems the circuit I conceive works. So could anyone explain to me why an AND gate needs six transistors?

Thanks in advance!