Timeline for 8051 interrupt within interrupt high vs low priority
Current License: CC BY-SA 4.0
6 events
| when toggle format | what | by | license | comment | |
|---|---|---|---|---|---|
| Jun 16, 2024 at 6:17 | answer | added | NinjaDarth | timeline score: 0 | |
| Oct 27, 2021 at 0:22 | comment | added | shafik | Oh, yeah. I was a bit aloof from the fact that if an ISR has to operate on any certain register or memory location, it can simply save everything, do it's own job, then load everything back and then return. That way it won't be much of a mess and would be relatively simpler to design and manage. Thanks, specially for the last point. | |
| Oct 26, 2021 at 18:50 | answer | added | Syed | timeline score: 1 | |
| Oct 26, 2021 at 16:12 | answer | added | devnull | timeline score: 2 | |
| Oct 26, 2021 at 16:03 | comment | added | linuxfan says Reinstate Monica | I think you are right, generally. Just a few things: 1) in a interrupt handler you have to manually re-enable interrupts, if you want to be further interrupted. 2) interrupts are checked sequentially, probably in order of some internal priority, but anyway it's very difficult for two interrupts to happen "in the same time". 3) An interrupt interrupting another interrupt does nothing special: every IRQ handler MUST, ALWAYS, preserve the registers it modifies - and that is all. | |
| Oct 26, 2021 at 15:03 | history | asked | shafik | CC BY-SA 4.0 |