Timeline for Why is S=1, R=1 state forbidden in RS flip flop?
Current License: CC BY-SA 3.0
7 events
| when toggle format | what | by | license | comment | |
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| Jun 16, 2022 at 16:28 | comment | added | Ukpa Uchechi | Please can anyone help explain this, the flip flop is often times explained using the nand or nor gates, also stating that the outputs must be an inverse of each other, then I look at the And or Or flip flop with is not the case, so does that mean only nand/nor gate should be used for flip flop? 2) if any gate can be used why is the inverse always emphasised | |
| Sep 10, 2019 at 15:56 | comment | added | Aaron Franke | Electrically, both Q and Qbar are allowed to be zero simultaneously. It violates the logical purpose of having both outputs and having them be unequal, but it's not really a contradiction as far as the NOR gates are concerned. | |
| May 8, 2017 at 14:39 | comment | added | Bilow | Why would one gate reach the 1 state in real world ? Would it still be forbidden if we don't care about the relation Q = !Q ? | |
| Mar 27, 2013 at 13:56 | history | edited | Renan | CC BY-SA 3.0 | LaTeX fix |
| Mar 27, 2013 at 12:55 | vote | accept | Mohammed Fawzan | ||
| Mar 27, 2013 at 2:19 | history | edited | Renan | CC BY-SA 3.0 | added 222 characters in body |
| Mar 27, 2013 at 2:08 | history | answered | Renan | CC BY-SA 3.0 |