Timeline for How to Achieve 0.1 Hz Resolution from 0 to 10 kHz Using STM32 Timer?
Current License: CC BY-SA 4.0
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| when toggle format | what | by | license | comment | |
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| May 8 at 20:32 | comment | added | Justme | I thought of the same to use the internal PLL to generate suitable frequency for timer to divide by integer, but the problem is that the timers still runs in the sysclk-derived busclocks when detecting external input counting edges, so anyway output will update based on the 84 MHz clock. The only solution would be to adjust the main system clock if possible. | |
| May 8 at 13:23 | history | answered | Spehro 'speff' Pefhany | CC BY-SA 4.0 |