I am currently designing an HDI-PCB. Outer-layers micro vias, inner layers buried vias.
As cost is of big concern my idea is to not fill and cap (copper plating) vias (100 μm drill ~ 75 μm finished diameter) in 0201 and 0.35 mm pitch BGA pads.
My reasoning is: As the outer prepreg (60 μm) and the copper film (30 μm after plating) are extremely thin (~90 μm) I do hope, that there is no issue in reliable soldering.
As a precaution I did place such a via in every BGA pad (so it does sit "in the pit"), as well as on every 0201 pad (not just a single pad per part were required).
My questions: How wrong is this assumption?
Are there any suggestions to minimize negative effects and still save the extra cost associated with via filling and plating (low quantities, so rather high PCB costs)?
Do you have any experience with such an approach (assembly yield, etc.)?
Why do I ask: I have read some articles and posts - these give me headaches. But, as these discussions do mostly focus on ~0.3 mm vias through 1.6 mm PCBs, I am still optimistic.