When you first turn on a flip flop like jk but with both input as 1 what will happen as there is no previous state to toggle.
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- 2\$\begingroup\$ You don't provide any context. But I never used 74xx series FFs without providing the system with a power-on reset signal. This was an absolute requirement. The 7400 series FF devices I used provide a CLR and sometimes also a SET input, which could be used with the power-on reset to ensure their state when power is applied. \$\endgroup\$periblepsis– periblepsis2023-05-28 20:59:57 +00:00Commented May 28, 2023 at 20:59
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2 Answers
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The power-on condition of any flip-flop is undefined. Maybe output \$Q=1\$, maybe it's \$Q=0\$. Maybe the clock will be triggered as power is applied, maybe it won't.
What happens depends on the physical implementation of the flip-flop, the rate at which power supply voltage rises, the random state of noise present, and any number of other variables at work.
Generally, if it's required that the flip-flop adopt a predictable, known, state immediately after power is applied, then measures must be taken to enforce that condition. For instance:
simulate this circuit – Schematic created using CircuitLab
In this cross-coupled NOR gate implementation of the classic "set-reset" (SR) flip-flop, R1 and C1 hold the one of the NOR inputs high immediately following power on. Eventually, after about one millisecond, that input falls low, and stays there until the next power cycle.
This guarantees that the flip-flop's output \$Q\$ goes immediately high after power is applied (inputs R and S permitting, of course).
Without R1 and C1 present, there is no such guarantee.
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The behavior when there is no previous state to toggle depends on the specific implementation and could lead to an undefined or unpredictable initial output state.
