I've been trying to run some relatively simple simulations but am running into strange behavior, which I've narrowed down to using the non-ideal capacitor parameters in LTSpice (in both an old and an up to date version). This is what I'm running:
And this is the result I'm getting:
I don't understand what's happening at the 500MHz mark, why is the current suddenly increasing again?
Here's the contents of the LTSpice ASC file:
Version 4 SHEET 1 2036 680 WIRE 1232 -320 1152 -320 WIRE 1568 -320 1488 -320 WIRE 1568 -304 1568 -320 WIRE 1152 -208 1152 -320 WIRE 1232 -208 1232 -320 WIRE 1488 -208 1488 -320 WIRE 1568 -208 1568 -224 WIRE 1568 -112 1568 -144 WIRE 1152 -16 1152 -128 WIRE 1232 -16 1232 -144 WIRE 1488 -16 1488 -128 WIRE 1568 -16 1568 -32 FLAG 1152 -16 0 FLAG 1488 -16 0 FLAG 1568 -16 0 FLAG 1232 -16 0 SYMBOL Misc\\signal 1152 -224 M0 WINDOW 123 24 132 Left 2 WINDOW 39 0 0 Left 0 SYMATTR Value2 AC 1 SYMATTR InstName V1 SYMBOL cap 1216 -208 R0 SYMATTR InstName C1 SYMATTR Value 10µ SYMATTR SpiceLine Rser=10m Lser=10n SYMBOL Misc\\signal 1488 -224 M0 WINDOW 123 24 132 Left 2 WINDOW 39 0 0 Left 0 SYMATTR Value2 AC 1 SYMATTR InstName V2 SYMBOL cap 1552 -208 R0 SYMATTR InstName C2 SYMATTR Value 10µ SYMBOL res 1552 -320 R0 SYMATTR InstName R1 SYMATTR Value 10m SYMBOL ind 1552 -128 R0 SYMATTR InstName L1 SYMATTR Value 10n SYMATTR SpiceLine Rser=0 TEXT 1224 56 Left 2 !.ac dec 1000 1 10G 
