Unless I have made an error I believe this can be done with 3 NAND gates. The truth table must look like this: $$\begin{smallmatrix}\begin{array}{rrr|cc} U & S1 & L & P1 & \text{comments}\\ \hline 0 & 0 & 0 & 1 &\\ 0 & 0 & 1 & 0 \\ 0 & 1 & 0 & 1 \\ 0 & 1 & 1 & 1 \\ 1 & 0 & 0 & x & \text{can't happen}\\ 1 & 0 & 1 & 0\\ 1 & 1 & 0 & x & \text{can't happen}\\ 1 & 1 & 1 & 0\\ \end{array}\end{smallmatrix}$$ Using a Karnaugh map to find the Boolean expression yields a realization that uses 3 2-input NAND-gates.
Carl
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