Cluster vsetvl in same configure

Author: BeMg

llvm/lib/Target/RISCV/RISCVTargetMachine.cpp

@@ -17,6 +17,7 @@
 #include "RISCVMachineScheduler.h"
 #include "RISCVTargetObjectFile.h"
 #include "RISCVTargetTransformInfo.h"
+#include "RISCVVSETVLCluster.h"
 #include "TargetInfo/RISCVTargetInfo.h"
 #include "llvm/ADT/STLExtras.h"
 #include "llvm/Analysis/TargetTransformInfo.h"
@@ -107,6 +108,11 @@ static cl::opt<bool>
  cl::desc("RISC-V vsetvl aware scheduler"),
  cl::init(false));
 
+static cl::opt<bool>
+ EnableVSETVLIClustering("riscv-vsetvli-cluster", cl::Hidden,
+ cl::desc("vsetvl insertion clustring"),
+ cl::init(false));
+
 extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeRISCVTarget() {
  RegisterTargetMachine<RISCVTargetMachine> X(getTheRISCV32Target());
  RegisterTargetMachine<RISCVTargetMachine> Y(getTheRISCV64Target());
@@ -357,6 +363,11 @@ class RISCVPassConfig : public TargetPassConfig {
  DAG->addMutation(createLoadClusterDAGMutation(
  DAG->TII, DAG->TRI, /*ReorderWhileClustering=*/true));
  }
+
+ if (EnableVSETVLIClustering) {
+ DAG = DAG ? DAG : createGenericSchedLive(C);
+ DAG->addMutation(createRISCVVSETVLClusteringDAGMutation());
+ }
  return DAG;
  }
 

llvm/lib/Target/RISCV/RISCVVSETVLCluster.cpp

@@ -12,7 +12,13 @@
 //===----------------------------------------------------------------------===//
 
 #include "RISCVVSETVLCluster.h"
+#include "RISCV.h"
+#include "RISCVSubtarget.h"
+#include "llvm/ADT/DenseMap.h"
+#include "llvm/CodeGen/MachineInstr.h"
+#include "llvm/CodeGen/MachineRegisterInfo.h"
 #include "llvm/CodeGen/ScheduleDAGInstrs.h"
+#include <utility>
 
 using namespace llvm;
 
@@ -24,7 +30,62 @@ class VSETVLClustering : public ScheduleDAGMutation {
  void apply(ScheduleDAGInstrs *DAG) override;
 };
 
-void VSETVLClustering::apply(ScheduleDAGInstrs *DAG) {}
+static void
+collectCandidate(ScheduleDAGInstrs *DAG,
+ SmallVector<std::pair<SUnit *, VSETVLIInfo>> &Candidate) {
+ for (SUnit &SU : DAG->SUnits) {
+ if (SU.isInstr()) {
+ MachineInstr *MI = SU.getInstr();
+ const RISCVSubtarget &STI = MI->getMF()->getSubtarget<RISCVSubtarget>();
+ uint64_t TSFlags = MI->getDesc().TSFlags;
+ if (!RISCVII::hasSEWOp(TSFlags))
+ continue;
+
+ VSETVLIInfo Info = computeInfoForInstr(*MI, &STI, nullptr);
+ Candidate.push_back(std::make_pair(&SU, Info));
+ }
+ }
+}
+
+void VSETVLClustering::apply(ScheduleDAGInstrs *DAG) {
+ SmallVector<std::pair<SUnit *, VSETVLIInfo>> Candidate;
+ collectCandidate(DAG, Candidate);
+
+ SmallVector<SmallVector<std::pair<SUnit *, VSETVLIInfo>>> VSETVLGroups;
+
+ for (auto &Tmp : Candidate) {
+ SUnit *SU = Tmp.first;
+ VSETVLIInfo Info = Tmp.second;
+ bool Found = false;
+ for (auto &Group : VSETVLGroups) {
+ if (Group[0].second == Info &&
+ all_of(Group, [SU, DAG](std::pair<SUnit *, VSETVLIInfo> Member) {
+ return !DAG->IsReachable(SU, Member.first) &&
+ !DAG->IsReachable(Member.first, SU);
+ })) {
+ Found = true;
+ Group.push_back(Tmp);
+ break;
+ }
+ }
+
+ if (!Found) {
+ SmallVector<std::pair<SUnit *, VSETVLIInfo>> NewGroup;
+ NewGroup.push_back(Tmp);
+ VSETVLGroups.push_back(NewGroup);
+ }
+ }
+
+ for (auto &Group : VSETVLGroups) {
+ if (Group.size() < 2)
+ continue;
+
+ SUnit *CurrSU = Group[0].first;
+ for (auto *I = Group.begin() + 1; I != Group.end(); I++) {
+ DAG->addEdge(CurrSU, SDep(I->first, SDep::Cluster));
+ }
+ }
+}
 
 } // end namespace
 

llvm/lib/Target/RISCV/RISCVVSETVLCluster.h

@@ -10,6 +10,7 @@
 #define LLVM_LIB_TARGET_RISCV_VSETVL_CLUSTERING_H
 
 #include "llvm/CodeGen/ScheduleDAGMutation.h"
+#include "RISCVInsertVSETVLI.h"
 #include <memory>
 
 namespace llvm {