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| 4 | +KL MICROCODE RELEASE DOCUMENT -- V347 |
| 5 | +March 1984 |
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| 36 | +Copyright (C)1977,1978,1979,1980,1981,1982,1983,1984 |
| 37 | +Digital Equipment Corporation, Maynard, Mass. |
| 38 | + |
| 39 | + |
| 40 | +This software is furnished under a license for use only on a single |
| 41 | +computer system and may be copied only with the inclusion of the above |
| 42 | +copyright notice. This software, or any other copies thereof, may not |
| 43 | +be provided or otherwise made available to any other person except for |
| 44 | +use on such system and to one who agrees to these license terms. |
| 45 | +Title to and ownership of the software shall at all times remain in |
| 46 | +DEC. |
| 47 | + |
| 48 | +The information in this software is subject to change without notice |
| 49 | +and should not be construed as a commitment by Digital Equipment |
| 50 | +Corporation. |
| 51 | + |
| 52 | +DEC assumes no responsibility for the use or reliability of its |
| 53 | +software on equipment which is not supplied by DEC. |
| 54 | +KL MICROCODE RELEASE DOCUMENT -- V347 Page 2 |
| 55 | + |
| 56 | + |
| 57 | +V347RG.DOC -- v347 |
| 58 | +March 1984 |
| 59 | + |
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| 67 | + |
| 68 | +1.0 SUMMARY |
| 69 | + |
| 70 | + |
| 71 | + 1. Microcode version 347 is the eleventh release of the KL10 |
| 72 | + microcode. Microcode version 347 appears as KLX.MCB only. |
| 73 | + It supports a model B KL10 with or without MCA25 for TOPS-20 |
| 74 | + V5.1 or earlier only. |
| 75 | + |
| 76 | + This is the sixth release of the KL10 microcode that supports |
| 77 | + an 'Extended KL10' described in the Hardware Reference |
| 78 | + Manual. Only KLX.RAM supports the 'Extended KL10'. (KLX.MCB |
| 79 | + is derived from KLX.RAM and does support the 'Extended |
| 80 | + KL10'.) |
| 81 | + |
| 82 | + The KL10 microcode is different for TOPS-10 and TOPS-20 |
| 83 | + systems. The KL10 microcode is different for model A and |
| 84 | + model B processors. (What engineering calls a model B |
| 85 | + processor is sometimes known as a KL10-PV.) The TOPS-10 |
| 86 | + microcode for model A processors is called U.RAM, for model B |
| 87 | + processors it is UB.RAM. The TOPS-20 microcode for model A |
| 88 | + processors is called KLL.RAM, for model B processors it is |
| 89 | + called KLX.RAM. The PDP-11 front end requires different |
| 90 | + formats of the microcode files. These translated files have |
| 91 | + different names. TOPS-10 model A: UA.MCB. TOPS-10 model B: |
| 92 | + UB.MCB. TOPS-20 model A: KLA.MCB. TOPS-20 model B: |
| 93 | + KLX.MCB. |
| 94 | + |
| 95 | + 2. The KL10 microcode is not dependent on any monitor, but |
| 96 | + because of hardware differences between the various -10 |
| 97 | + processors, a monitor must be built specifically for the |
| 98 | + KL10. KL10 microcode version 347 has been tested with the |
| 99 | + TOPS-20 release 5.1 monitor. |
| 100 | + |
| 101 | +See LCREV for information regarding microcode requirements for various |
| 102 | +hardware revision levels. |
| 103 | + |
| 104 | + |
| 105 | + |
| 106 | +2.0 KNOWN DEFICIENCIES |
| 107 | + |
| 108 | + |
| 109 | + None |
| 110 | + |
| 111 | +KL MICROCODE RELEASE DOCUMENT -- V347 Page 3 |
| 112 | + |
| 113 | + |
| 114 | +3.0 FIXED PROBLEMS |
| 115 | + |
| 116 | +The following problems have been fixed: |
| 117 | + |
| 118 | +347 20 Jan 84--Rewrite the MVST and CMPS dispatches to test for illegal |
| 119 | + bits in the lengths before BRX gets smashed. UUO was reporting a |
| 120 | + bogus op code in these situations. |
| 121 | + Turn on BIG.PT by default, since it should work with both old and |
| 122 | + new software and hardware. |
| 123 | +346 18 Jan 84--Fix the .IFNOT variation of BIG.PT to clear the Keep |
| 124 | + bit if anybody sets it. This was introduced in 343. |
| 125 | + Add the DDT.BUG conditional. Under it, rewrite APRID to move |
| 126 | + bit 23 to bit 5 if it is set in the serial number. This is a |
| 127 | + piece of garbage which I hope can disappear soon (it seems EDDT |
| 128 | + used the serial number to test for a KS-10!). |
| 129 | + Fix the time field on the page map word type dispatch (the assembler |
| 130 | + default was too high). Also make the PAGCNT conditional hang on |
| 131 | + to the original AR value after it counts the PFH entry (this would |
| 132 | + only matter for an AR parity error). |
| 133 | +344 1 Dec 83--Save CVTBDx fill character address, which was getting lost |
| 134 | + if OWGBPs were in use, in a manner similar to that used in CMPSx |
| 135 | + (see edit 310). Also, fix some conditionals for EXPMSK constant |
| 136 | + generation, so that OWGBPs will assemble with EXTEXP off. |
| 137 | +342 8 Nov 83--Change definition of CLR PT LINE to be consistent with |
| 138 | + new paging board (see also 333). Also, redefine bit 3 of effective |
| 139 | + word to reverse keep sense (so unkept only pages are cleared when |
| 140 | + bit 3 is set). |
| 141 | +336 9 Aug 83--Back off 330 for a bit, since TOPS-10 7.02 must be tested |
| 142 | + and OWGs in section 0 fail for string instructions (they get converted |
| 143 | + to TWGs, which are illegal in section 0). For now, we will maintain |
| 144 | + both sources. |
| 145 | +335 Force memory to be released for SMP case of DPB if P > 36 causes no |
| 146 | + actual data to be stored. Make an OWG reference to an address > |
| 147 | + 37,,777777 cause a page fail (GBYTE was stripping the excess bits). |
| 148 | +334 Fix conflict generated in CLRPT by 333 by creating new subroutine |
| 149 | + ARSWAP which is just AR_AR SWAP. Make several other routines call it, |
| 150 | + thus saving a few words. |
| 151 | +333 Add new conditional BIG.PT. Under it, add code to implement the "Keep |
| 152 | + me" bit for paging as bit 5 of the page table, and to move it to page |
| 153 | + map bit 23 during page refill. Also make DATAO PAG not clear Kept |
| 154 | + pages if bit 3 of the word is off. |
| 155 | +332 Redefine all bank 7 ACs as R0,...,R17, and all bank 6 ACs as P0,..., |
| 156 | + P17. Change all other alias definitions to refer to these. This |
| 157 | + gives us a uniform cross reference for all scratch register references. |
| 158 | + Put all macro definitions into alphabetical order, making it easier |
| 159 | + to look up a macro definition. Split the edit history into its own |
| 160 | + file. There are no functional changes from 331. |
| 161 | +331 Allow XSFM anywhere. Clean up the code a bit in the process. There |
| 162 | + still remain a number of references to XSFM or XPCW distinctions, |
| 163 | + and these could almost certainly be cleaned up further. |
| 164 | +330 Allow one word global byte pointers in section zero. This includes |
| 165 | + changes in BYTE, EIS, and FP. Change GBYTE and CNV2WD to return 2; |
| 166 | + eliminate GTST as obsolete. Also shuffle the calls to these routines |
| 167 | + to conform to the new calling conventions, and put the OWG test at |
| 168 | + the beginning of IBP, ILDB, IDBP, LDB, DPB, and ADJBP. |
| 169 | +KL MICROCODE RELEASE DOCUMENT -- V347 Page 4 |
| 170 | + |
| 171 | + |
| 172 | +327 Add PAGCNT conditional. Under it, include control to count entry |
| 173 | + into PFH code and DATAO PAG with bit 2 set. |
| 174 | + |
| 175 | + |
| 176 | + |
| 177 | +4.0 RELATED DOCUMENTATION |
| 178 | + |
| 179 | + |
| 180 | +The microcode is implicitly documented in the System Reference Manual, |
| 181 | +in that it is an implementation of a PDP-10. The only other |
| 182 | +documentation is in the listing and prints of the KL10 processor. |
| 183 | + |
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| 188 | + |
| 189 | +5.0 FUNCTION OF THE DIFFERENT MICROCODE VERSIONS. |
| 190 | + |
| 191 | + |
| 192 | +U.RAM is the microprogram which directs the operation of the KL10 |
| 193 | +model A hardware to emulate the behavior of a PDP-10 for a TOPS-10 |
| 194 | +system. UB.RAM is the microprogram which directs the operation of the |
| 195 | +KL10 model B hardware (KL10-PV) to emulate the behavior of a PDP-10 |
| 196 | +for a TOPS-10 system. UB.RAM should look exactly like U.RAM to PDP-10 |
| 197 | +software. |
| 198 | + |
| 199 | + |
| 200 | + |
| 201 | +KLL.RAM is the microprogram which directs the operation of the KL10 |
| 202 | +model A hardware to emulate the behavior of a PDP-10 for a TOPS-20 |
| 203 | +system. KLX.RAM is the microprogram which directs the operation of |
| 204 | +the KL10 model B hardware to emulate the behavior of a PDP-10 for a |
| 205 | +TOPS-20 system. KLX.RAM implements the 'Extended KL10' explained in |
| 206 | +the Hardware Reference Manual. |
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