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@hdelan hdelan commented Nov 14, 2023

  1. Fix a race condition in cmpxchg
  2. Change atomic_xor to use a CAS loop instead of atomic builtin. This is needed to merge this in UR [HIP] Revert add prefetch for USM hip allocations a6b8fa66b537753415d24076f… oneapi-src/unified-runtime#936 so that perf regression can be fixed. The long term fix is to use a compiler flag to choose between builtin and safe CAS implementation, but talks upstream may take some time to figure out the details. See [AMDGPU] Add an option to disable unsafe uses of atomic xor llvm/llvm-project#69229
@hdelan hdelan requested a review from a team as a code owner November 14, 2023 09:54
@hdelan hdelan requested a review from JackAKirk November 14, 2023 09:54
@hdelan hdelan closed this Nov 15, 2023
@hdelan hdelan reopened this Nov 15, 2023
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LGTM

@hdelan
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hdelan commented Nov 15, 2023

@intel/llvm-gatekeepers we would like to merge this soon if that's OK

@steffenlarsen
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Windows CI build only failed in post-testing cleanup. Merging.

@steffenlarsen steffenlarsen merged commit c1ef658 into intel:sycl Nov 15, 2023
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hdelan commented Nov 15, 2023

Thanks @steffenlarsen !

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