[Attributor] Fix Load/Store Offsets if multiple bins are present for a pointer allocation.

Author: vidsinghal

llvm/include/llvm/Transforms/IPO/Attributor.h

@@ -6122,6 +6122,8 @@ struct AAPointerInfo : public AbstractAttribute {
  virtual const_bin_iterator begin() const = 0;
  virtual const_bin_iterator end() const = 0;
  virtual int64_t numOffsetBins() const = 0;
+ virtual void dumpState(raw_ostream &O) const = 0;
+ virtual const Access &getBinAccess(unsigned Index) const = 0;
 
  /// Call \p CB on all accesses that might interfere with \p Range and return
  /// true if all such accesses were known and the callback returned true for
@@ -6293,6 +6295,9 @@ struct AAAllocationInfo : public StateWrapper<BooleanState, AbstractAttribute> {
 
  virtual std::optional<TypeSize> getAllocatedSize() const = 0;
 
+ using NewOffsetsTy = DenseMap<AA::RangeTy, AA::RangeTy>;
+ virtual const NewOffsetsTy &getNewOffsets() const = 0;
+
  /// See AbstractAttribute::getName()
  const std::string getName() const override { return "AAAllocationInfo"; }
 

llvm/lib/Transforms/IPO/AttributorAttributes.cpp

@@ -1083,6 +1083,10 @@ struct AAPointerInfoImpl
  return State::numOffsetBins();
  }
 
+ virtual const Access &getBinAccess(unsigned Index) const override {
+ return getAccess(Index);
+ }
+
  bool forallInterferingAccesses(
  AA::RangeTy Range,
  function_ref<bool(const AAPointerInfo::Access &, bool)> CB)
@@ -1429,7 +1433,7 @@ struct AAPointerInfoImpl
  void trackPointerInfoStatistics(const IRPosition &IRP) const {}
 
  /// Dump the state into \p O.
- void dumpState(raw_ostream &O) {
+ virtual void dumpState(raw_ostream &O) const override {
  for (auto &It : OffsetBins) {
  O << "[" << It.first.Offset << "-" << It.first.Offset + It.first.Size
  << "] : " << It.getSecond().size() << "\n";
@@ -12686,6 +12690,11 @@ struct AAAllocationInfoImpl : public AAAllocationInfo {
  return AssumedAllocatedSize;
  }
 
+ const NewOffsetsTy &getNewOffsets() const override {
+ assert(isValidState() && "the AA is invalid");
+ return NewComputedOffsets;
+ }
+
  std::optional<TypeSize> findInitialAllocationSize(Instruction *I,
  const DataLayout &DL) {
 
@@ -12735,37 +12744,42 @@ struct AAAllocationInfoImpl : public AAAllocationInfo {
  if (*AllocationSize == 0)
  return indicatePessimisticFixpoint();
 
- int64_t BinSize = PI->numOffsetBins();
-
- // TODO: implement for multiple bins
- if (BinSize > 1)
- return indicatePessimisticFixpoint();
+ int64_t NumBins = PI->numOffsetBins();
 
- if (BinSize == 0) {
+ if (NumBins == 0) {
  auto NewAllocationSize = std::optional<TypeSize>(TypeSize(0, false));
  if (!changeAllocationSize(NewAllocationSize))
  return ChangeStatus::UNCHANGED;
  return ChangeStatus::CHANGED;
  }
 
- // TODO: refactor this to be part of multiple bin case
- const auto &It = PI->begin();
+ // For each access bin
+ // Compute its new start Offset and store the results in a new map
+ // (NewOffsetBins).
+ int64_t PrevBinEndOffset = 0;
+ bool ChangedOffsets = false;
+ for (AAPointerInfo::OffsetBinsTy::const_iterator It = PI->begin();
+ It != PI->end(); It++) {
+ const AA::RangeTy &OldRange = It->getFirst();
+ int64_t NewStartOffset = PrevBinEndOffset;
+ int64_t NewEndOffset = NewStartOffset + OldRange.Size;
+ PrevBinEndOffset = NewEndOffset;
 
- // TODO: handle if Offset is not zero
- if (It->first.Offset != 0)
- return indicatePessimisticFixpoint();
-
- uint64_t SizeOfBin = It->first.Offset + It->first.Size;
-
- if (SizeOfBin >= *AllocationSize)
- return indicatePessimisticFixpoint();
+ ChangedOffsets |= setNewOffsets(OldRange, OldRange.Offset, NewStartOffset,
+ OldRange.Size);
+ }
 
+ // Set the new size of the allocation, the new size of the Allocation should
+ // be the size of NewEndOffset * 8, in bits.
  auto NewAllocationSize =
- std::optional<TypeSize>(TypeSize(SizeOfBin * 8, false));
+ std::optional<TypeSize>(TypeSize(PrevBinEndOffset * 8, false));
 
  if (!changeAllocationSize(NewAllocationSize))
  return ChangeStatus::UNCHANGED;
 
+ if (!ChangedOffsets)
+ return ChangeStatus::UNCHANGED;
+
  return ChangeStatus::CHANGED;
  }
 
@@ -12775,12 +12789,13 @@ struct AAAllocationInfoImpl : public AAAllocationInfo {
  assert(isValidState() &&
  "Manifest should only be called if the state is valid.");
 
- Instruction *I = getIRPosition().getCtxI();
+ bool Changed = false;
+ const IRPosition &IRP = getIRPosition();
+ Instruction *I = IRP.getCtxI();
 
  auto FixedAllocatedSizeInBits = getAllocatedSize()->getFixedValue();
 
  unsigned long NumBytesToAllocate = (FixedAllocatedSizeInBits + 7) / 8;
-
  switch (I->getOpcode()) {
  // TODO: add case for malloc like calls
  case Instruction::Alloca: {
@@ -12789,25 +12804,98 @@ struct AAAllocationInfoImpl : public AAAllocationInfo {
 
  Type *CharType = Type::getInt8Ty(I->getContext());
 
- auto *NumBytesToValue =
- ConstantInt::get(I->getContext(), APInt(32, NumBytesToAllocate));
+ Type *CharArrayType = ArrayType::get(CharType, NumBytesToAllocate);
 
  BasicBlock::iterator insertPt = AI->getIterator();
  insertPt = std::next(insertPt);
- AllocaInst *NewAllocaInst =
- new AllocaInst(CharType, AI->getAddressSpace(), NumBytesToValue,
- AI->getAlign(), AI->getName(), insertPt);
-
- if (A.changeAfterManifest(IRPosition::inst(*AI), *NewAllocaInst))
- return ChangeStatus::CHANGED;
+ AllocaInst *NewAllocaInst = new AllocaInst(
+ CharArrayType, AI->getAddressSpace(), AI->getName(), insertPt);
 
+ Changed |= A.changeAfterManifest(IRPosition::inst(*AI), *NewAllocaInst);
  break;
  }
  default:
  break;
  }
 
- return ChangeStatus::UNCHANGED;
+ const AAPointerInfo *PI =
+ A.getOrCreateAAFor<AAPointerInfo>(IRP, *this, DepClassTy::REQUIRED);
+
+ if (!PI)
+ return ChangeStatus::UNCHANGED;
+
+ if (!PI->getState().isValidState())
+ return ChangeStatus::UNCHANGED;
+
+ const auto &NewOffsetsMap = getNewOffsets();
+ for (AAPointerInfo::OffsetBinsTy::const_iterator It = PI->begin();
+ It != PI->end(); It++) {
+
+ const auto &OldOffsetRange = It->getFirst();
+
+ // If the OldOffsetRange is not in the map, offsets for that bin did not
+ // change We should just continue and skip changing the offsets in that
+ // case
+ if (!NewOffsetsMap.contains(OldOffsetRange))
+ continue;
+
+ const auto &NewOffsetRange = NewOffsetsMap.lookup(OldOffsetRange);
+ for (const auto AccIndex : It->getSecond()) {
+
+ const auto &AccessInstruction = PI->getBinAccess(AccIndex);
+ auto *LocalInst = AccessInstruction.getLocalInst();
+
+ switch (LocalInst->getOpcode()) {
+ case Instruction::Load: {
+ LoadInst *OldLoadInst = cast<LoadInst>(LocalInst);
+ Value *PointerOperand = OldLoadInst->getPointerOperand();
+
+ IntegerType *Int8TyInteger =
+ IntegerType::get(LocalInst->getContext(), 8);
+ IntegerType *Int64TyInteger =
+ IntegerType::get(LocalInst->getContext(), 64);
+ Value *indexList[2] = {
+ ConstantInt::get(Int64TyInteger, 0),
+ ConstantInt::get(Int64TyInteger,
+ NewOffsetRange.Offset - OldOffsetRange.Offset)};
+ Value *GepToNewAddress = GetElementPtrInst::Create(
+ Int8TyInteger, PointerOperand, indexList, "NewGep", OldLoadInst);
+
+ LoadInst *NewLoadInst =
+ new LoadInst(OldLoadInst->getType(), GepToNewAddress,
+ OldLoadInst->getName(), OldLoadInst);
+ Changed |= A.changeAfterManifest(IRPosition::inst(*OldLoadInst),
+ *NewLoadInst);
+ break;
+ }
+ case Instruction::Store: {
+ StoreInst *OldStoreInst = cast<StoreInst>(LocalInst);
+ Value *PointerOperand = OldStoreInst->getPointerOperand();
+
+ IntegerType *Int8TyInteger =
+ IntegerType::get(LocalInst->getContext(), 8);
+ IntegerType *Int64TyInteger =
+ IntegerType::get(LocalInst->getContext(), 64);
+ Value *indexList[2] = {
+ ConstantInt::get(Int64TyInteger, 0),
+ ConstantInt::get(Int64TyInteger,
+ NewOffsetRange.Offset - OldOffsetRange.Offset)};
+ Value *GepToNewAddress = GetElementPtrInst::Create(
+ Int8TyInteger, PointerOperand, indexList, "NewGep", OldStoreInst);
+
+ StoreInst *NewStoreInst = new StoreInst(
+ OldStoreInst->getValueOperand(), GepToNewAddress, OldStoreInst);
+ Changed |= A.changeAfterManifest(IRPosition::inst(*OldStoreInst),
+ *NewStoreInst);
+ break;
+ }
+ }
+ }
+ }
+
+ if (!Changed)
+ return ChangeStatus::UNCHANGED;
+ return ChangeStatus::CHANGED;
  }
 
  /// See AbstractAttribute::getAsStr().
@@ -12821,8 +12909,28 @@ struct AAAllocationInfoImpl : public AAAllocationInfo {
  ")";
  }
 
+ void dumpNewOffsetBins(raw_ostream &O) {
+
+ O << "Printing Map from [OldOffsetsRange] : [NewOffsetsRange] if the "
+ "offsets changed."
+ << "\n";
+ const auto &NewOffsetsMap = getNewOffsets();
+ for (auto It = NewOffsetsMap.begin(); It != NewOffsetsMap.end(); It++) {
+
+ const auto &OldRange = It->getFirst();
+ const auto &NewRange = It->getSecond();
+
+ O << "[" << OldRange.Offset << "," << OldRange.Offset + OldRange.Size
+ << "] : ";
+ O << "[" << NewRange.Offset << "," << NewRange.Offset + NewRange.Size
+ << "]";
+ O << "\n";
+ }
+ }
+
 private:
  std::optional<TypeSize> AssumedAllocatedSize = HasNoAllocationSize;
+ NewOffsetsTy NewComputedOffsets;
 
  // Maintain the computed allocation size of the object.
  // Returns (bool) weather the size of the allocation was modified or not.
@@ -12834,6 +12942,21 @@ struct AAAllocationInfoImpl : public AAAllocationInfo {
  }
  return false;
  }
+
+ // Maps an old byte range to its new Offset range in the new allocation.
+ // Returns (bool) weather the old byte range's offsets changed or not.
+ bool setNewOffsets(const AA::RangeTy &OldRange, int64_t OldOffset,
+ int64_t NewComputedOffset, int64_t Size) {
+
+ if (OldOffset == NewComputedOffset)
+ return false;
+
+ AA::RangeTy &NewRange = NewComputedOffsets.getOrInsertDefault(OldRange);
+ NewRange.Offset = NewComputedOffset;
+ NewRange.Size = Size;
+
+ return true;
+ }
 };
 
 struct AAAllocationInfoFloating : AAAllocationInfoImpl {

llvm/test/Transforms/Attributor/ArgumentPromotion/2008-02-01-ReturnAttrs.ll

@@ -9,8 +9,8 @@ define internal i32 @deref(ptr %x) nounwind {
 ; CGSCC-NEXT: entry:
 ; CGSCC-NEXT: [[X_PRIV:%.*]] = alloca i32, align 4
 ; CGSCC-NEXT: store i32 [[TMP0]], ptr [[X_PRIV]], align 4
-; CGSCC-NEXT: [[TRUETMP2:%.*]] = load i32, ptr [[X_PRIV]], align 4
-; CGSCC-NEXT: ret i32 [[TRUETMP2]]
+; CGSCC-NEXT: [[TMP2:%.*]] = load i32, ptr [[X_PRIV]], align 4
+; CGSCC-NEXT: ret i32 [[TMP2]]
 ;
 entry:
  %tmp2 = load i32, ptr %x, align 4
@@ -22,18 +22,18 @@ define i32 @f(i32 %x) {
 ; TUNIT-LABEL: define {{[^@]+}}@f
 ; TUNIT-SAME: (i32 returned [[X:%.*]]) #[[ATTR0:[0-9]+]] {
 ; TUNIT-NEXT: entry:
-; TUNIT-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4
-; TUNIT-NEXT: store i32 [[X]], ptr [[X_ADDR]], align 4
+; TUNIT-NEXT: [[X_ADDR1:%.*]] = alloca i8, i32 4, align 4
+; TUNIT-NEXT: store i32 [[X]], ptr [[X_ADDR1]], align 4
 ; TUNIT-NEXT: ret i32 [[X]]
 ;
 ; CGSCC: Function Attrs: mustprogress nofree nosync nounwind willreturn memory(none)
 ; CGSCC-LABEL: define {{[^@]+}}@f
 ; CGSCC-SAME: (i32 [[X:%.*]]) #[[ATTR1:[0-9]+]] {
 ; CGSCC-NEXT: entry:
-; CGSCC-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4
-; CGSCC-NEXT: store i32 [[X]], ptr [[X_ADDR]], align 4
-; CGSCC-NEXT: [[TRUETMP1:%.*]] = call i32 @deref(i32 [[X]]) #[[ATTR2:[0-9]+]]
-; CGSCC-NEXT: ret i32 [[TRUETMP1]]
+; CGSCC-NEXT: [[X_ADDR1:%.*]] = alloca i8, i32 4, align 4
+; CGSCC-NEXT: store i32 [[X]], ptr [[X_ADDR1]], align 4
+; CGSCC-NEXT: [[TMP1:%.*]] = call i32 @deref(i32 [[X]]) #[[ATTR2:[0-9]+]]
+; CGSCC-NEXT: ret i32 [[TMP1]]
 ;
 entry:
  %x_addr = alloca i32

llvm/test/Transforms/Attributor/ArgumentPromotion/X86/attributes.ll

@@ -26,24 +26,24 @@ define void @no_promote(ptr %arg) #1 {
 ; TUNIT-LABEL: define {{[^@]+}}@no_promote
 ; TUNIT-SAME: (ptr nocapture nofree writeonly [[ARG:%.*]]) #[[ATTR1:[0-9]+]] {
 ; TUNIT-NEXT: bb:
-; TUNIT-NEXT: [[TMP:%.*]] = alloca <4 x i64>, align 32
-; TUNIT-NEXT: [[TRUETMP2:%.*]] = alloca <4 x i64>, align 32
-; TUNIT-NEXT: call void @llvm.memset.p0.i64(ptr noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP]], i8 noundef 0, i64 noundef 32, i1 noundef false) #[[ATTR3:[0-9]+]]
-; TUNIT-NEXT: call fastcc void @no_promote_avx2(ptr noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TRUETMP2]], ptr noalias nocapture nofree noundef nonnull readonly align 32 dereferenceable(32) [[TMP]]) #[[ATTR4:[0-9]+]]
-; TUNIT-NEXT: [[TRUETMP4:%.*]] = load <4 x i64>, ptr [[TRUETMP2]], align 32
-; TUNIT-NEXT: store <4 x i64> [[TRUETMP4]], ptr [[ARG]], align 2
+; TUNIT-NEXT: [[TMP1:%.*]] = alloca i8, i32 32, align 32
+; TUNIT-NEXT: [[TMP22:%.*]] = alloca i8, i32 32, align 32
+; TUNIT-NEXT: call void @llvm.memset.p0.i64(ptr noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP1]], i8 noundef 0, i64 noundef 32, i1 noundef false) #[[ATTR3:[0-9]+]]
+; TUNIT-NEXT: call fastcc void @no_promote_avx2(ptr noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP22]], ptr noalias nocapture nofree noundef nonnull readonly align 32 dereferenceable(32) [[TMP1]]) #[[ATTR4:[0-9]+]]
+; TUNIT-NEXT: [[TMP4:%.*]] = load <4 x i64>, ptr [[TMP22]], align 32
+; TUNIT-NEXT: store <4 x i64> [[TMP4]], ptr [[ARG]], align 2
 ; TUNIT-NEXT: ret void
 ;
 ; CGSCC: Function Attrs: mustprogress nofree nosync nounwind willreturn memory(argmem: readwrite) uwtable
 ; CGSCC-LABEL: define {{[^@]+}}@no_promote
 ; CGSCC-SAME: (ptr nocapture nofree noundef nonnull writeonly align 2 dereferenceable(32) [[ARG:%.*]]) #[[ATTR1:[0-9]+]] {
 ; CGSCC-NEXT: bb:
 ; CGSCC-NEXT: [[TMP:%.*]] = alloca <4 x i64>, align 32
-; CGSCC-NEXT: [[TRUETMP2:%.*]] = alloca <4 x i64>, align 32
+; CGSCC-NEXT: [[TMP2:%.*]] = alloca <4 x i64>, align 32
 ; CGSCC-NEXT: call void @llvm.memset.p0.i64(ptr noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP]], i8 noundef 0, i64 noundef 32, i1 noundef false) #[[ATTR3:[0-9]+]]
-; CGSCC-NEXT: call fastcc void @no_promote_avx2(ptr noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TRUETMP2]], ptr noalias nocapture nofree noundef nonnull readonly align 32 dereferenceable(32) [[TMP]]) #[[ATTR4:[0-9]+]]
-; CGSCC-NEXT: [[TRUETMP4:%.*]] = load <4 x i64>, ptr [[TRUETMP2]], align 32
-; CGSCC-NEXT: store <4 x i64> [[TRUETMP4]], ptr [[ARG]], align 2
+; CGSCC-NEXT: call fastcc void @no_promote_avx2(ptr noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP2]], ptr noalias nocapture nofree noundef nonnull readonly align 32 dereferenceable(32) [[TMP]]) #[[ATTR4:[0-9]+]]
+; CGSCC-NEXT: [[TMP4:%.*]] = load <4 x i64>, ptr [[TMP2]], align 32
+; CGSCC-NEXT: store <4 x i64> [[TMP4]], ptr [[ARG]], align 2
 ; CGSCC-NEXT: ret void
 ;
 bb:
@@ -78,26 +78,26 @@ define void @promote(ptr %arg) #0 {
 ; TUNIT-LABEL: define {{[^@]+}}@promote
 ; TUNIT-SAME: (ptr nocapture nofree writeonly [[ARG:%.*]]) #[[ATTR0]] {
 ; TUNIT-NEXT: bb:
-; TUNIT-NEXT: [[TMP:%.*]] = alloca <4 x i64>, align 32
-; TUNIT-NEXT: [[TRUETMP2:%.*]] = alloca <4 x i64>, align 32
-; TUNIT-NEXT: call void @llvm.memset.p0.i64(ptr noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP]], i8 noundef 0, i64 noundef 32, i1 noundef false) #[[ATTR3]]
-; TUNIT-NEXT: [[TMP0:%.*]] = load <4 x i64>, ptr [[TMP]], align 32
-; TUNIT-NEXT: call fastcc void @promote_avx2(ptr noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TRUETMP2]], <4 x i64> [[TMP0]]) #[[ATTR4]]
-; TUNIT-NEXT: [[TRUETMP4:%.*]] = load <4 x i64>, ptr [[TRUETMP2]], align 32
-; TUNIT-NEXT: store <4 x i64> [[TRUETMP4]], ptr [[ARG]], align 2
+; TUNIT-NEXT: [[TMP1:%.*]] = alloca i8, i32 32, align 32
+; TUNIT-NEXT: [[TMP22:%.*]] = alloca i8, i32 32, align 32
+; TUNIT-NEXT: call void @llvm.memset.p0.i64(ptr noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP1]], i8 noundef 0, i64 noundef 32, i1 noundef false) #[[ATTR3]]
+; TUNIT-NEXT: [[TMP0:%.*]] = load <4 x i64>, ptr [[TMP1]], align 32
+; TUNIT-NEXT: call fastcc void @promote_avx2(ptr noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP22]], <4 x i64> [[TMP0]]) #[[ATTR4]]
+; TUNIT-NEXT: [[TMP4:%.*]] = load <4 x i64>, ptr [[TMP22]], align 32
+; TUNIT-NEXT: store <4 x i64> [[TMP4]], ptr [[ARG]], align 2
 ; TUNIT-NEXT: ret void
 ;
 ; CGSCC: Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable
 ; CGSCC-LABEL: define {{[^@]+}}@promote
 ; CGSCC-SAME: (ptr nocapture nofree noundef nonnull writeonly align 2 dereferenceable(32) [[ARG:%.*]]) #[[ATTR0]] {
 ; CGSCC-NEXT: bb:
-; CGSCC-NEXT: [[TMP:%.*]] = alloca <4 x i64>, align 32
-; CGSCC-NEXT: [[TRUETMP2:%.*]] = alloca <4 x i64>, align 32
-; CGSCC-NEXT: call void @llvm.memset.p0.i64(ptr noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP]], i8 noundef 0, i64 noundef 32, i1 noundef false) #[[ATTR3]]
-; CGSCC-NEXT: [[TMP0:%.*]] = load <4 x i64>, ptr [[TMP]], align 32
-; CGSCC-NEXT: call fastcc void @promote_avx2(ptr noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TRUETMP2]], <4 x i64> [[TMP0]]) #[[ATTR4]]
-; CGSCC-NEXT: [[TRUETMP4:%.*]] = load <4 x i64>, ptr [[TRUETMP2]], align 32
-; CGSCC-NEXT: store <4 x i64> [[TRUETMP4]], ptr [[ARG]], align 2
+; CGSCC-NEXT: [[TMP1:%.*]] = alloca i8, i32 32, align 32
+; CGSCC-NEXT: [[TMP2:%.*]] = alloca <4 x i64>, align 32
+; CGSCC-NEXT: call void @llvm.memset.p0.i64(ptr noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP1]], i8 noundef 0, i64 noundef 32, i1 noundef false) #[[ATTR3]]
+; CGSCC-NEXT: [[TMP0:%.*]] = load <4 x i64>, ptr [[TMP1]], align 32
+; CGSCC-NEXT: call fastcc void @promote_avx2(ptr noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP2]], <4 x i64> [[TMP0]]) #[[ATTR4]]
+; CGSCC-NEXT: [[TMP4:%.*]] = load <4 x i64>, ptr [[TMP2]], align 32
+; CGSCC-NEXT: store <4 x i64> [[TMP4]], ptr [[ARG]], align 2
 ; CGSCC-NEXT: ret void
 ;
 bb: