[lld] Add target support for SystemZ (s390x) (#75643)

This patch adds full support for linking SystemZ (ELF s390x) object files. Support should be generally complete: - All relocation types are supported. - Full shared library support (DYNAMIC, GOT, PLT, ifunc). - Relaxation of TLS and GOT relocations where appropriate. - Platform-specific test cases. In addition to new platform code and the obvious changes, there were a few additional changes to common code: - Add three new RelExpr members (R_GOTPLT_OFF, R_GOTPLT_PC, and R_PLT_GOTREL) needed to support certain s390x relocations. I chose not to use a platform-specific name since nothing in the definition of these relocs is actually platform-specific; it is well possible that other platforms will need the same. - A couple of tweaks to TLS relocation handling, as the particular semantics of the s390x versions differ slightly. See comments in the code. This was tested by building and testing >1500 Fedora packages, with only a handful of failures; as these also have issues when building with LLD on other architectures, they seem unrelated. Co-authored-by: Tulio Magno Quites Machado Filho <tuliom@redhat.com> (cherry picked from commit fe3406e)

Author: 2 people

lld/ELF/Arch/SystemZ.cpp

@@ -33,6 +33,7 @@ add_lld_library(lldELF
  Arch/PPC64.cpp
  Arch/RISCV.cpp
  Arch/SPARCV9.cpp
+ Arch/SystemZ.cpp
  Arch/X86.cpp
  Arch/X86_64.cpp
  ARMErrataFix.cpp

lld/ELF/CMakeLists.txt

@@ -200,6 +200,7 @@ static std::tuple<ELFKind, uint16_t, uint8_t> parseEmulation(StringRef emul) {
  .Case("msp430elf", {ELF32LEKind, EM_MSP430})
  .Case("elf64_amdgpu", {ELF64LEKind, EM_AMDGPU})
  .Case("elf64loongarch", {ELF64LEKind, EM_LOONGARCH})
+ .Case("elf64_s390", {ELF64BEKind, EM_S390})
  .Default({ELFNoneKind, EM_NONE});
 
  if (ret.first == ELFNoneKind)
@@ -1137,7 +1138,7 @@ static SmallVector<StringRef, 0> getSymbolOrderingFile(MemoryBufferRef mb) {
 static bool getIsRela(opt::InputArgList &args) {
  // The psABI specifies the default relocation entry format.
  bool rela = is_contained({EM_AARCH64, EM_AMDGPU, EM_HEXAGON, EM_LOONGARCH,
- EM_PPC, EM_PPC64, EM_RISCV, EM_X86_64},
+ EM_PPC, EM_PPC64, EM_RISCV, EM_S390, EM_X86_64},
  config->emachine);
  // If -z rel or -z rela is specified, use the last option.
  for (auto *arg : args.filtered(OPT_z)) {

lld/ELF/Driver.cpp

@@ -1614,6 +1614,8 @@ static uint16_t getBitcodeMachineKind(StringRef path, const Triple &t) {
  return EM_RISCV;
  case Triple::sparcv9:
  return EM_SPARCV9;
+ case Triple::systemz:
+ return EM_S390;
  case Triple::x86:
  return t.isOSIAMCU() ? EM_IAMCU : EM_386;
  case Triple::x86_64:

lld/ELF/InputFiles.cpp

@@ -654,6 +654,7 @@ static int64_t getTlsTpOffset(const Symbol &s) {
 
  // Variant 2.
  case EM_HEXAGON:
+ case EM_S390:
  case EM_SPARCV9:
  case EM_386:
  case EM_X86_64:
@@ -716,6 +717,10 @@ uint64_t InputSectionBase::getRelocTargetVA(const InputFile *file, RelType type,
  case R_GOT_PC:
  case R_RELAX_TLS_GD_TO_IE:
  return sym.getGotVA() + a - p;
+ case R_GOTPLT_GOTREL:
+ return sym.getGotPltVA() + a - in.got->getVA();
+ case R_GOTPLT_PC:
+ return sym.getGotPltVA() + a - p;
  case R_LOONGARCH_GOT_PAGE_PC:
  if (sym.hasFlag(NEEDS_TLSGD))
  return getLoongArchPageDelta(in.got->getGlobalDynAddr(sym) + a, p, type);
@@ -807,6 +812,8 @@ uint64_t InputSectionBase::getRelocTargetVA(const InputFile *file, RelType type,
  return getLoongArchPageDelta(sym.getPltVA() + a, p, type);
  case R_PLT_GOTPLT:
  return sym.getPltVA() + a - in.gotPlt->getVA();
+ case R_PLT_GOTREL:
+ return sym.getPltVA() + a - in.got->getVA();
  case R_PPC32_PLTREL:
  // R_PPC_PLTREL24 uses the addend (usually 0 or 0x8000) to indicate r30
  // stores _GLOBAL_OFFSET_TABLE_ or .got2+0x8000. The addend is ignored for

lld/ELF/InputSection.cpp

@@ -203,8 +203,9 @@ static bool isAbsoluteValue(const Symbol &sym) {
 
 // Returns true if Expr refers a PLT entry.
 static bool needsPlt(RelExpr expr) {
- return oneof<R_PLT, R_PLT_PC, R_PLT_GOTPLT, R_LOONGARCH_PLT_PAGE_PC,
- R_PPC32_PLTREL, R_PPC64_CALL_PLT>(expr);
+ return oneof<R_PLT, R_PLT_PC, R_PLT_GOTREL, R_PLT_GOTPLT, R_GOTPLT_GOTREL,
+ R_GOTPLT_PC, R_LOONGARCH_PLT_PAGE_PC, R_PPC32_PLTREL,
+ R_PPC64_CALL_PLT>(expr);
 }
 
 bool lld::elf::needsGot(RelExpr expr) {
@@ -233,6 +234,8 @@ static RelExpr toPlt(RelExpr expr) {
  return R_PLT_PC;
  case R_ABS:
  return R_PLT;
+ case R_GOTREL:
+ return R_PLT_GOTREL;
  default:
  return expr;
  }
@@ -253,6 +256,8 @@ static RelExpr fromPlt(RelExpr expr) {
  return R_ABS;
  case R_PLT_GOTPLT:
  return R_GOTPLTREL;
+ case R_PLT_GOTREL:
+ return R_GOTREL;
  default:
  return expr;
  }
@@ -979,10 +984,10 @@ bool RelocationScanner::isStaticLinkTimeConstant(RelExpr e, RelType type,
  if (oneof<R_GOTPLT, R_GOT_OFF, R_RELAX_HINT, R_MIPS_GOT_LOCAL_PAGE,
  R_MIPS_GOTREL, R_MIPS_GOT_OFF, R_MIPS_GOT_OFF32, R_MIPS_GOT_GP_PC,
  R_AARCH64_GOT_PAGE_PC, R_GOT_PC, R_GOTONLY_PC, R_GOTPLTONLY_PC,
- R_PLT_PC, R_PLT_GOTPLT, R_PPC32_PLTREL, R_PPC64_CALL_PLT,
- R_PPC64_RELAX_TOC, R_RISCV_ADD, R_AARCH64_GOT_PAGE,
- R_LOONGARCH_PLT_PAGE_PC, R_LOONGARCH_GOT, R_LOONGARCH_GOT_PAGE_PC>(
- e))
+ R_PLT_PC, R_PLT_GOTREL, R_PLT_GOTPLT, R_GOTPLT_GOTREL, R_GOTPLT_PC,
+ R_PPC32_PLTREL, R_PPC64_CALL_PLT, R_PPC64_RELAX_TOC, R_RISCV_ADD,
+ R_AARCH64_GOT_PAGE, R_LOONGARCH_PLT_PAGE_PC, R_LOONGARCH_GOT,
+  R_LOONGARCH_GOT_PAGE_PC>(e))
  return true;
 
  // These never do, except if the entire file is position dependent or if
@@ -1374,8 +1379,8 @@ static unsigned handleTlsRelocation(RelType type, Symbol &sym,
  R_LOONGARCH_GOT_PAGE_PC, R_GOT_OFF, R_TLSIE_HINT>(expr)) {
  ctx.hasTlsIe.store(true, std::memory_order_relaxed);
  // Initial-Exec relocs can be optimized to Local-Exec if the symbol is
- // locally defined.
- if (execOptimize && isLocalInExecutable) {
+ // locally defined. This is not supported on SystemZ.
+ if (execOptimize && isLocalInExecutable && config->emachine != EM_S390) {
  c.addReloc({R_RELAX_TLS_IE_TO_LE, type, offset, addend, &sym});
  } else if (expr != R_TLSIE_HINT) {
  sym.setFlags(NEEDS_TLSIE);
@@ -1534,8 +1539,10 @@ void RelocationScanner::scan(ArrayRef<RelTy> rels) {
  // For EhInputSection, OffsetGetter expects the relocations to be sorted by
  // r_offset. In rare cases (.eh_frame pieces are reordered by a linker
  // script), the relocations may be unordered.
+ // On SystemZ, all sections need to be sorted by r_offset, to allow TLS
+ // relaxation to be handled correctly - see SystemZ::getTlsGdRelaxSkip.
  SmallVector<RelTy, 0> storage;
- if (isa<EhInputSection>(sec))
+ if (isa<EhInputSection>(sec) || config->emachine == EM_S390)
  rels = sortRels(rels, storage);
 
  end = static_cast<const void *>(rels.end());

lld/ELF/Relocations.cpp

@@ -40,11 +40,14 @@ enum RelExpr {
  R_GOTPLT,
  R_GOTPLTREL,
  R_GOTREL,
+ R_GOTPLT_GOTREL,
+ R_GOTPLT_PC,
  R_NONE,
  R_PC,
  R_PLT,
  R_PLT_PC,
  R_PLT_GOTPLT,
+ R_PLT_GOTREL,
  R_RELAX_HINT,
  R_RELAX_GOT_PC,
  R_RELAX_GOT_PC_NOPIC,

lld/ELF/Relocations.h

@@ -445,6 +445,7 @@ static std::pair<ELFKind, uint16_t> parseBfdName(StringRef s) {
  .Case("elf32-msp430", {ELF32LEKind, EM_MSP430})
  .Case("elf32-loongarch", {ELF32LEKind, EM_LOONGARCH})
  .Case("elf64-loongarch", {ELF64LEKind, EM_LOONGARCH})
+ .Case("elf64-s390", {ELF64BEKind, EM_S390})
  .Default({ELFNoneKind, EM_NONE});
 }
 

lld/ELF/ScriptParser.cpp

@@ -1419,6 +1419,9 @@ DynamicSection<ELFT>::computeContents() {
  case EM_MIPS:
  addInSec(DT_MIPS_PLTGOT, *in.gotPlt);
  break;
+ case EM_S390:
+ addInSec(DT_PLTGOT, *in.got);
+ break;
  case EM_SPARCV9:
  addInSec(DT_PLTGOT, *in.plt);
  break;

lld/ELF/SyntheticSections.cpp

@@ -87,6 +87,8 @@ TargetInfo *elf::getTarget() {
  return getRISCVTargetInfo();
  case EM_SPARCV9:
  return getSPARCV9TargetInfo();
+ case EM_S390:
+ return getSystemZTargetInfo();
  case EM_X86_64:
  return getX86_64TargetInfo();
  }