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CostModel/RISCV: tweak test for ctpop, with/without ZVBB (#67013)
Vector ctpop only exists under ZVBB, but ZVBB is unaccounted for in the cost-model of ctpop. Document this defect with an additional RUN line in the test for ctpop, showing identical costs with/without ZVBB. A follow-up patch could fix this defect.
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llvm/test/Analysis/CostModel/RISCV/int-bit-manip.ll

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; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
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; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -S -mtriple=riscv64 -mattr=+v,+f,+d -riscv-v-vector-bits-min=-1 | FileCheck %s
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; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -S -mtriple=riscv64 -mattr=+v,+f,+d -riscv-v-vector-bits-min=-1 | FileCheck %s --check-prefixes=CHECK,NOZVBB
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; Vector ctpop exists only under ZVBB
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; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -S -mtriple=riscv64 -mattr=+v,+f,+d,+experimental-zvbb -riscv-v-vector-bits-min=-1 | FileCheck %s --check-prefixes=CHECK,ZVBB
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define void @bswap() {
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; CHECK-LABEL: 'bswap'
@@ -849,3 +851,6 @@ declare <vscale x 2 x i64> @llvm.vp.cttz.nvx2i64(<vscale x 2 x i64>, i1 immarg,
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declare <vscale x 4 x i64> @llvm.vp.cttz.nvx4i64(<vscale x 4 x i64>, i1 immarg, <vscale x 4 x i1>, i32)
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declare <vscale x 8 x i64> @llvm.vp.cttz.nvx8i64(<vscale x 8 x i64>, i1 immarg, <vscale x 8 x i1>, i32)
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declare <vscale x 16 x i64> @llvm.vp.cttz.nvx16i64(<vscale x 16 x i64>, i1 immarg, <vscale x 16 x i1>, i32)
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;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
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; NOZVBB: {{.*}}
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; ZVBB: {{.*}}

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