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ParkHanbumParkHanbum
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[InstCombine] Tests that changed due to a patch
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-62
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2 files changed

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‎llvm/test/Transforms/InstCombine/select-of-bittest.ll‎

Lines changed: 12 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -9,9 +9,8 @@
99
define i8 @src_and_bit(i8 %x, i8 %y) {
1010
; CHECK-LABEL: @src_and_bit(
1111
; CHECK-NEXT: [[AND:%.*]] = and i8 [[X:%.*]], 3
12-
; CHECK-NEXT: [[AND1:%.*]] = and i8 [[X]], 2
1312
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[AND]], 2
14-
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i8 [[AND1]], i8 1
13+
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i8 2, i8 1
1514
; CHECK-NEXT: ret i8 [[COND]]
1615
;
1716
%and = and i8 %x, 3
@@ -24,9 +23,8 @@ define i8 @src_and_bit(i8 %x, i8 %y) {
2423
define <2 x i8> @src_and_bit_vec(<2 x i8> %x, <2 x i8> %y) {
2524
; CHECK-LABEL: @src_and_bit_vec(
2625
; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> [[X:%.*]], <i8 3, i8 3>
27-
; CHECK-NEXT: [[AND1:%.*]] = and <2 x i8> [[X]], <i8 2, i8 2>
2826
; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i8> [[AND]], <i8 2, i8 2>
29-
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i8> [[AND1]], <2 x i8> <i8 1, i8 1>
27+
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i8> <i8 2, i8 2>, <2 x i8> <i8 1, i8 1>
3028
; CHECK-NEXT: ret <2 x i8> [[COND]]
3129
;
3230
%and = and <2 x i8> %x, <i8 3, i8 3>
@@ -39,9 +37,8 @@ define <2 x i8> @src_and_bit_vec(<2 x i8> %x, <2 x i8> %y) {
3937
define <2 x i8> @src_and_bit_vec_poison(<2 x i8> %x, <2 x i8> %y) {
4038
; CHECK-LABEL: @src_and_bit_vec_poison(
4139
; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> [[X:%.*]], <i8 poison, i8 3>
42-
; CHECK-NEXT: [[AND1:%.*]] = and <2 x i8> [[X]], <i8 poison, i8 2>
4340
; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i8> [[AND]], <i8 2, i8 2>
44-
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i8> [[AND1]], <2 x i8> <i8 1, i8 1>
41+
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i8> <i8 2, i8 2>, <2 x i8> <i8 1, i8 1>
4542
; CHECK-NEXT: ret <2 x i8> [[COND]]
4643
;
4744
%and = and <2 x i8> %x, <i8 poison, i8 3>
@@ -54,9 +51,8 @@ define <2 x i8> @src_and_bit_vec_poison(<2 x i8> %x, <2 x i8> %y) {
5451
define <2 x i8> @src_and_bit_vec_poison2(<2 x i8> %x, <2 x i8> %y) {
5552
; CHECK-LABEL: @src_and_bit_vec_poison2(
5653
; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> [[X:%.*]], <i8 poison, i8 3>
57-
; CHECK-NEXT: [[AND1:%.*]] = and <2 x i8> [[X]], <i8 poison, i8 2>
5854
; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i8> [[AND]], <i8 2, i8 2>
59-
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i8> [[AND1]], <2 x i8> <i8 1, i8 1>
55+
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i8> <i8 2, i8 2>, <2 x i8> <i8 1, i8 1>
6056
; CHECK-NEXT: ret <2 x i8> [[COND]]
6157
;
6258
%and = and <2 x i8> %x, <i8 poison, i8 3>
@@ -70,13 +66,11 @@ define <2 x i8> @src_and_bit_vec_poison2(<2 x i8> %x, <2 x i8> %y) {
7066
; ====================== OR =======================
7167
define i8 @src_or_bit(i8 %x, i8 %y, i8 %z) {
7268
; CHECK-LABEL: @src_or_bit(
73-
; CHECK-NEXT: [[AND:%.*]] = and i8 [[Z:%.*]], 3
7469
; CHECK-NEXT: [[AND1:%.*]] = shl i8 [[Y:%.*]], 2
7570
; CHECK-NEXT: [[SHL:%.*]] = and i8 [[AND1]], 12
7671
; CHECK-NEXT: [[OR:%.*]] = or i8 [[SHL]], [[X:%.*]]
7772
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[OR]], 3
78-
; CHECK-NEXT: [[OR2:%.*]] = or i8 [[AND]], [[X]]
79-
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i8 [[OR2]], i8 1
73+
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i8 3, i8 1
8074
; CHECK-NEXT: ret i8 [[COND]]
8175
;
8276
%and = and i8 %z, 3
@@ -90,13 +84,11 @@ define i8 @src_or_bit(i8 %x, i8 %y, i8 %z) {
9084
}
9185
define <2 x i8> @src_or_bit_vec(<2 x i8> %x, <2 x i8> %y, <2 x i8> %z) {
9286
; CHECK-LABEL: @src_or_bit_vec(
93-
; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> [[Z:%.*]], <i8 3, i8 3>
9487
; CHECK-NEXT: [[AND1:%.*]] = shl <2 x i8> [[Y:%.*]], <i8 2, i8 2>
9588
; CHECK-NEXT: [[SHL:%.*]] = and <2 x i8> [[AND1]], <i8 12, i8 12>
9689
; CHECK-NEXT: [[OR:%.*]] = or <2 x i8> [[SHL]], [[X:%.*]]
9790
; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i8> [[OR]], <i8 3, i8 3>
98-
; CHECK-NEXT: [[OR2:%.*]] = or <2 x i8> [[AND]], [[X]]
99-
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i8> [[OR2]], <2 x i8> <i8 1, i8 1>
91+
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i8> <i8 3, i8 3>, <2 x i8> <i8 1, i8 1>
10092
; CHECK-NEXT: ret <2 x i8> [[COND]]
10193
;
10294
%and = and <2 x i8> %z, <i8 3, i8 3>
@@ -110,13 +102,11 @@ define <2 x i8> @src_or_bit_vec(<2 x i8> %x, <2 x i8> %y, <2 x i8> %z) {
110102
}
111103
define <2 x i8> @src_or_bit_vec_poison(<2 x i8> %x, <2 x i8> %y, <2 x i8> %z) {
112104
; CHECK-LABEL: @src_or_bit_vec_poison(
113-
; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> [[Z:%.*]], <i8 3, i8 poison>
114105
; CHECK-NEXT: [[AND1:%.*]] = shl <2 x i8> [[Y:%.*]], <i8 2, i8 poison>
115106
; CHECK-NEXT: [[SHL:%.*]] = and <2 x i8> [[AND1]], <i8 12, i8 poison>
116107
; CHECK-NEXT: [[OR:%.*]] = or <2 x i8> [[SHL]], [[X:%.*]]
117108
; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i8> [[OR]], <i8 3, i8 3>
118-
; CHECK-NEXT: [[OR2:%.*]] = or <2 x i8> [[AND]], [[X]]
119-
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i8> [[OR2]], <2 x i8> <i8 1, i8 1>
109+
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i8> <i8 3, i8 3>, <2 x i8> <i8 1, i8 1>
120110
; CHECK-NEXT: ret <2 x i8> [[COND]]
121111
;
122112
%and = and <2 x i8> %z, <i8 3, i8 poison>
@@ -130,13 +120,11 @@ define <2 x i8> @src_or_bit_vec_poison(<2 x i8> %x, <2 x i8> %y, <2 x i8> %z) {
130120
}
131121
define <2 x i8> @src_or_bit_vec_poison2(<2 x i8> %x, <2 x i8> %y, <2 x i8> %z) {
132122
; CHECK-LABEL: @src_or_bit_vec_poison2(
133-
; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> [[Z:%.*]], <i8 poison, i8 3>
134123
; CHECK-NEXT: [[AND1:%.*]] = shl <2 x i8> [[Y:%.*]], <i8 poison, i8 2>
135124
; CHECK-NEXT: [[SHL:%.*]] = and <2 x i8> [[AND1]], <i8 poison, i8 12>
136125
; CHECK-NEXT: [[OR:%.*]] = or <2 x i8> [[SHL]], [[X:%.*]]
137126
; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i8> [[OR]], <i8 3, i8 3>
138-
; CHECK-NEXT: [[OR2:%.*]] = or <2 x i8> [[AND]], [[X]]
139-
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i8> [[OR2]], <2 x i8> <i8 1, i8 1>
127+
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i8> <i8 3, i8 3>, <2 x i8> <i8 1, i8 1>
140128
; CHECK-NEXT: ret <2 x i8> [[COND]]
141129
;
142130
%and = and <2 x i8> %z, <i8 poison, i8 3>
@@ -154,8 +142,7 @@ define i8 @src_xor_bit(i8 %x, i8 %y) {
154142
; CHECK-NEXT: [[AND:%.*]] = and i8 [[Y:%.*]], 12
155143
; CHECK-NEXT: [[XOR:%.*]] = xor i8 [[AND]], [[X:%.*]]
156144
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[XOR]], 3
157-
; CHECK-NEXT: [[AND1:%.*]] = and i8 [[X]], 3
158-
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i8 [[AND1]], i8 1
145+
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i8 3, i8 1
159146
; CHECK-NEXT: ret i8 [[COND]]
160147
;
161148
%and = and i8 %y, 12
@@ -170,8 +157,7 @@ define <2 x i8> @src_xor_bit_vec(<2 x i8> %x, <2 x i8> %y) {
170157
; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> [[Y:%.*]], <i8 12, i8 12>
171158
; CHECK-NEXT: [[XOR:%.*]] = xor <2 x i8> [[AND]], [[X:%.*]]
172159
; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i8> [[XOR]], <i8 3, i8 3>
173-
; CHECK-NEXT: [[AND1:%.*]] = and <2 x i8> [[X]], <i8 3, i8 3>
174-
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i8> [[AND1]], <2 x i8> <i8 1, i8 1>
160+
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i8> <i8 3, i8 3>, <2 x i8> <i8 1, i8 1>
175161
; CHECK-NEXT: ret <2 x i8> [[COND]]
176162
;
177163
%and = and <2 x i8> %y, <i8 12, i8 12>
@@ -186,8 +172,7 @@ define <2 x i8> @src_xor_bit_vec_poison(<2 x i8> %x, <2 x i8> %y) {
186172
; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> [[Y:%.*]], <i8 poison, i8 12>
187173
; CHECK-NEXT: [[XOR:%.*]] = xor <2 x i8> [[AND]], [[X:%.*]]
188174
; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i8> [[XOR]], <i8 3, i8 3>
189-
; CHECK-NEXT: [[AND1:%.*]] = and <2 x i8> [[X]], <i8 poison, i8 3>
190-
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i8> [[AND1]], <2 x i8> <i8 1, i8 1>
175+
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i8> <i8 3, i8 3>, <2 x i8> <i8 1, i8 1>
191176
; CHECK-NEXT: ret <2 x i8> [[COND]]
192177
;
193178
%and = and <2 x i8> %y, <i8 poison, i8 12>
@@ -202,8 +187,7 @@ define <2 x i8> @src_xor_bit_vec_poison2(<2 x i8> %x, <2 x i8> %y) {
202187
; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> [[Y:%.*]], <i8 poison, i8 12>
203188
; CHECK-NEXT: [[XOR:%.*]] = xor <2 x i8> [[AND]], [[X:%.*]]
204189
; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i8> [[XOR]], <i8 3, i8 3>
205-
; CHECK-NEXT: [[AND1:%.*]] = and <2 x i8> [[X]], <i8 3, i8 3>
206-
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i8> [[AND1]], <2 x i8> <i8 1, i8 1>
190+
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i8> <i8 3, i8 3>, <2 x i8> <i8 1, i8 1>
207191
; CHECK-NEXT: ret <2 x i8> [[COND]]
208192
;
209193
%and = and <2 x i8> %y, <i8 poison, i8 12>

‎llvm/test/Transforms/InstCombine/select.ll‎

Lines changed: 13 additions & 34 deletions
Original file line numberDiff line numberDiff line change
@@ -3701,12 +3701,8 @@ exit:
37013701
define i32 @src_and_eq_0_or_xor(i32 %x, i32 %y) {
37023702
; CHECK-LABEL: @src_and_eq_0_or_xor(
37033703
; CHECK-NEXT: entry:
3704-
; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y:%.*]], [[X:%.*]]
3705-
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0
3706-
; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y]], [[X]]
3707-
; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y]], [[X]]
3708-
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[OR]], i32 [[XOR]]
3709-
; CHECK-NEXT: ret i32 [[COND]]
3704+
; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], [[X:%.*]]
3705+
; CHECK-NEXT: ret i32 [[XOR]]
37103706
;
37113707
entry:
37123708
%and = and i32 %y, %x
@@ -3721,12 +3717,8 @@ entry:
37213717
define i32 @src_and_eq_0_xor_or(i32 %x, i32 %y) {
37223718
; CHECK-LABEL: @src_and_eq_0_xor_or(
37233719
; CHECK-NEXT: entry:
3724-
; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y:%.*]], [[X:%.*]]
3725-
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0
3726-
; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y]], [[X]]
3727-
; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y]], [[X]]
3728-
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[XOR]], i32 [[OR]]
3729-
; CHECK-NEXT: ret i32 [[COND]]
3720+
; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], [[X:%.*]]
3721+
; CHECK-NEXT: ret i32 [[OR]]
37303722
;
37313723
entry:
37323724
%and = and i32 %y, %x
@@ -3743,9 +3735,8 @@ define i32 @src_and_eq_neg1_or_xor(i32 %x, i32 %y) {
37433735
; CHECK-NEXT: entry:
37443736
; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y:%.*]], [[X:%.*]]
37453737
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], -1
3746-
; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y]], [[X]]
37473738
; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y]], [[X]]
3748-
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[OR]], i32 [[XOR]]
3739+
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 -1, i32 [[XOR]]
37493740
; CHECK-NEXT: ret i32 [[COND]]
37503741
;
37513742
entry:
@@ -3763,9 +3754,8 @@ define i32 @src_and_eq_neg1_xor_or(i32 %x, i32 %y) {
37633754
; CHECK-NEXT: entry:
37643755
; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y:%.*]], [[X:%.*]]
37653756
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], -1
3766-
; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y]], [[X]]
37673757
; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y]], [[X]]
3768-
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[XOR]], i32 [[OR]]
3758+
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 0, i32 [[OR]]
37693759
; CHECK-NEXT: ret i32 [[COND]]
37703760
;
37713761
entry:
@@ -3878,9 +3868,8 @@ define i32 @src_or_eq_0_and_xor(i32 %x, i32 %y) {
38783868
; CHECK-NEXT: entry:
38793869
; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], [[X:%.*]]
38803870
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[OR]], 0
3881-
; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], [[X]]
38823871
; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y]], [[X]]
3883-
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[AND]], i32 [[XOR]]
3872+
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 0, i32 [[XOR]]
38843873
; CHECK-NEXT: ret i32 [[COND]]
38853874
;
38863875
entry:
@@ -3898,9 +3887,8 @@ define i32 @src_or_eq_0_xor_and(i32 %x, i32 %y) {
38983887
; CHECK-NEXT: entry:
38993888
; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], [[X:%.*]]
39003889
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[OR]], 0
3901-
; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y]], [[X]]
39023890
; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], [[X]]
3903-
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[XOR]], i32 [[AND]]
3891+
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 0, i32 [[AND]]
39043892
; CHECK-NEXT: ret i32 [[COND]]
39053893
;
39063894
entry:
@@ -4301,9 +4289,8 @@ define i32 @src_select_xor_max_negative_int(i32 %x, i32 %y) {
43014289
; CHECK-LABEL: @src_select_xor_max_negative_int(
43024290
; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[X:%.*]], [[Y:%.*]]
43034291
; CHECK-NEXT: [[XOR0:%.*]] = icmp eq i32 [[XOR]], -1
4304-
; CHECK-NEXT: [[AND:%.*]] = and i32 [[X]], [[Y]]
43054292
; CHECK-NEXT: [[OR:%.*]] = or i32 [[X]], [[Y]]
4306-
; CHECK-NEXT: [[COND:%.*]] = select i1 [[XOR0]], i32 [[AND]], i32 [[OR]]
4293+
; CHECK-NEXT: [[COND:%.*]] = select i1 [[XOR0]], i32 0, i32 [[OR]]
43074294
; CHECK-NEXT: ret i32 [[COND]]
43084295
;
43094296
%xor = xor i32 %x, %y
@@ -4410,10 +4397,7 @@ define i32 @src_no_trans_select_or_eq0_or_xor(i32 %x, i32 %y) {
44104397
define i32 @src_no_trans_select_or_eq0_and_or(i32 %x, i32 %y) {
44114398
; CHECK-LABEL: @src_no_trans_select_or_eq0_and_or(
44124399
; CHECK-NEXT: [[OR:%.*]] = or i32 [[X:%.*]], [[Y:%.*]]
4413-
; CHECK-NEXT: [[OR0:%.*]] = icmp eq i32 [[OR]], 0
4414-
; CHECK-NEXT: [[AND:%.*]] = and i32 [[X]], [[Y]]
4415-
; CHECK-NEXT: [[COND:%.*]] = select i1 [[OR0]], i32 [[AND]], i32 [[OR]]
4416-
; CHECK-NEXT: ret i32 [[COND]]
4400+
; CHECK-NEXT: ret i32 [[OR]]
44174401
;
44184402
%or = or i32 %x, %y
44194403
%or0 = icmp eq i32 %or, 0
@@ -4425,10 +4409,7 @@ define i32 @src_no_trans_select_or_eq0_and_or(i32 %x, i32 %y) {
44254409
define i32 @src_no_trans_select_or_eq0_xor_or(i32 %x, i32 %y) {
44264410
; CHECK-LABEL: @src_no_trans_select_or_eq0_xor_or(
44274411
; CHECK-NEXT: [[OR:%.*]] = or i32 [[X:%.*]], [[Y:%.*]]
4428-
; CHECK-NEXT: [[OR0:%.*]] = icmp eq i32 [[OR]], 0
4429-
; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[X]], [[Y]]
4430-
; CHECK-NEXT: [[COND:%.*]] = select i1 [[OR0]], i32 [[XOR]], i32 [[OR]]
4431-
; CHECK-NEXT: ret i32 [[COND]]
4412+
; CHECK-NEXT: ret i32 [[OR]]
44324413
;
44334414
%or = or i32 %x, %y
44344415
%or0 = icmp eq i32 %or, 0
@@ -4484,8 +4465,7 @@ define i32 @src_no_trans_select_xor_eq0_and_xor(i32 %x, i32 %y) {
44844465
; CHECK-LABEL: @src_no_trans_select_xor_eq0_and_xor(
44854466
; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[X:%.*]], [[Y:%.*]]
44864467
; CHECK-NEXT: [[XOR0:%.*]] = icmp eq i32 [[XOR]], 0
4487-
; CHECK-NEXT: [[AND:%.*]] = and i32 [[X]], [[Y]]
4488-
; CHECK-NEXT: [[COND:%.*]] = select i1 [[XOR0]], i32 [[AND]], i32 [[XOR]]
4468+
; CHECK-NEXT: [[COND:%.*]] = select i1 [[XOR0]], i32 [[X]], i32 [[XOR]]
44894469
; CHECK-NEXT: ret i32 [[COND]]
44904470
;
44914471
%xor = xor i32 %x, %y
@@ -4500,8 +4480,7 @@ define i32 @src_no_trans_select_xor_eq0_or_xor(i32 %x, i32 %y) {
45004480
; CHECK-LABEL: @src_no_trans_select_xor_eq0_or_xor(
45014481
; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[X:%.*]], [[Y:%.*]]
45024482
; CHECK-NEXT: [[XOR0:%.*]] = icmp eq i32 [[XOR]], 0
4503-
; CHECK-NEXT: [[OR:%.*]] = or i32 [[X]], [[Y]]
4504-
; CHECK-NEXT: [[COND:%.*]] = select i1 [[XOR0]], i32 [[OR]], i32 [[XOR]]
4483+
; CHECK-NEXT: [[COND:%.*]] = select i1 [[XOR0]], i32 [[X]], i32 [[XOR]]
45054484
; CHECK-NEXT: ret i32 [[COND]]
45064485
;
45074486
%xor = xor i32 %x, %y

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