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[DebugInfo][NVPTX] Adding support for <code>inlined_at</code> debug directive in NVPTX backend

backend:NVPTX

debuginfo

llvm:codegen

llvm:mcMachine (object) codeMachine (object) code

Status: Open (in progress).

llvm/llvm-projectnumber 170239

#170239 In llvm/llvm-project;

· laxmansole opened on Dec 2, 2025

[clang][NVPTX] Add missing half-precision add/mul/fma intrinsics

backend:NVPTX

clang:frontendLanguage frontend issues, e.g. anything involving "Sema"Language frontend issues, e.g. anything involving "Sema"

llvm:ir

Status: Open (in progress).

llvm/llvm-projectnumber 170079

#170079 In llvm/llvm-project;

· Wolfram70 opened on Dec 1, 2025

[LowerMemIntrinsics] Optimize memset lowering

backend:AMDGPU

backend:NVPTX

backend:SPIR-V

llvm:codegen

llvm:globalisel

llvm:transforms

Status: Open (in progress).

llvm/llvm-projectnumber 169040

#169040 In llvm/llvm-project;

· ritter-x2a opened on Nov 21, 2025

[NVPTX] Use PRMT instruction to lower i16 bswap

backend:NVPTX

Status: Merged (completed).

llvm/llvm-projectnumber 168968

#168968 In llvm/llvm-project;

· by Chengjunp was closed on Nov 25, 2025

Reapply "DAG: Allow select ptr combine for non-0 address spaces" (#168292)

backend:AMDGPU

backend:NVPTX

llvm:SelectionDAGSelectionDAGISel as wellSelectionDAGISel as well

Status: Merged (completed).

llvm/llvm-projectnumber 168786

#168786 In llvm/llvm-project;

· by arsenm was closed on Nov 20, 2025

Revert "DAG: Allow select ptr combine for non-0 address spaces"

backend:AMDGPU

backend:NVPTX

llvm:SelectionDAGSelectionDAGISel as wellSelectionDAGISel as well

Status: Merged (completed).

llvm/llvm-projectnumber 168292

#168292 In llvm/llvm-project;

· by ronlieb was closed on Nov 16, 2025

DAG: Allow select ptr combine for non-0 address spaces

backend:AMDGPU

backend:NVPTX

llvm:SelectionDAGSelectionDAGISel as wellSelectionDAGISel as well

Status: Merged (completed).

llvm/llvm-projectnumber 167909

#167909 In llvm/llvm-project;

· by arsenm was closed on Nov 13, 2025

[clang][NVPTX] Add remaining float to fp16 conversions

backend:NVPTX

clangClang issues not falling into any other categoryClang issues not falling into any other category

clang:frontendLanguage frontend issues, e.g. anything involving "Sema"Language frontend issues, e.g. anything involving "Sema"

llvm:ir

Status: Merged (completed).

llvm/llvm-projectnumber 167641

#167641 In llvm/llvm-project;

· by Wolfram70 was closed on Nov 19, 2025

Infinite recursion in the 'NVPTX Replace Image Handles' pass with <code>@llvm.nvvm.sust.b.2d.*</code> intrinsics

backend:NVPTX

hangCompiler hang (infinite loop)Compiler hang (infinite loop)

Status: Open.

Bug

#166167 In llvm/llvm-project;

· Mike-Leo-Smith opened on Nov 3, 2025

CodeGen: Remove target hook for terminal rule

backend:AArch64

backend:AMDGPU

backend:ARM

backend:Hexagon

backend:NVPTX

backend:PowerPC

backend:RISC-V

backend:SystemZ

backend:WebAssembly

backend:X86

llvm:codegen

llvm:regalloc

Status: Merged (completed).

llvm/llvm-projectnumber 165962

#165962 In llvm/llvm-project;

· by arsenm was closed on Nov 12, 2025

[CodeGen][PreISelIntrinsicLowering] Add VP-based lowering for memcpy/memmove/memset

backend:NVPTX

backend:RISC-V

backend:SPIR-V

llvm:analysisIncludes value tracking, cost tables and constant foldingIncludes value tracking, cost tables and constant folding

llvm:codegen

llvm:transforms

Status: Open (in progress).

llvm/llvm-projectnumber 165585

#165585 In llvm/llvm-project;

· dadra-oc opened on Oct 29, 2025

[NVPTX] Add ex2.approx bf16 support and cleanup intrinsic definition

backend:NVPTX

clangClang issues not falling into any other categoryClang issues not falling into any other category

clang:codegenIR generation bugs: mangling, exceptions, etc.IR generation bugs: mangling, exceptions, etc.

llvm:ir

Status: Merged (completed).

llvm/llvm-projectnumber 165446

#165446 In llvm/llvm-project;

· by AlexMaclean was closed on Nov 1, 2025