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Fixes simple issue found static analyzer

backend:AArch64

backend:PowerPC

debuginfo

llvm:codegen

llvm:globalisel

llvm:transforms

Status: Open (in progress).

llvm/llvm-projectnumber 169958

#169958 In llvm/llvm-project;

· Seraphimt opened on Nov 28, 2025

[PowerPC] Add AMO load builtins for conditional increment/decrement

backend:PowerPC

clangClang issues not falling into any other categoryClang issues not falling into any other category

clang:codegenIR generation bugs: mangling, exceptions, etc.IR generation bugs: mangling, exceptions, etc.

clang:frontendLanguage frontend issues, e.g. anything involving "Sema"Language frontend issues, e.g. anything involving "Sema"

llvm:ir

Status: Open (in progress).

llvm/llvm-projectnumber 169435

#169435 In llvm/llvm-project;

· maryammo opened on Nov 25, 2025

optimize <code>is_finite</code> assembly

backend:AArch64

backend:AMDGPU

backend:PowerPC

backend:RISC-V

backend:X86

llvm:SelectionDAGSelectionDAGISel as wellSelectionDAGISel as well

Status: Open (in progress).

llvm/llvm-projectnumber 169402

#169402 In llvm/llvm-project;

· folkertdev opened on Nov 24, 2025

[VPlan] Use DL index type consistently for GEPs

backend:PowerPC

backend:RISC-V

llvm:transforms

vectorizers

Status: Merged (completed).

llvm/llvm-projectnumber 169396

#169396 In llvm/llvm-project;

· by artagnon was closed on Nov 26, 2025

<code>ppc64-lv2</code> target is non-functional

backend:PowerPC

crashPrefer [crash-on-valid] or [crash-on-invalid]Prefer [crash-on-valid] or [crash-on-invalid]

Status: Open.

Bug

#169283 In llvm/llvm-project;

· e820 opened on Nov 24, 2025

[PowerPC] cost modeling for length type VP intrinsic load/store

backend:PowerPC

llvm:analysisIncludes value tracking, cost tables and constant foldingIncludes value tracking, cost tables and constant folding

Status: Open (in progress).

llvm/llvm-projectnumber 168938

#168938 In llvm/llvm-project;

· RolandF77 opened on Nov 20, 2025

[VPlan] Directly unroll VectorPointerRecipe

backend:PowerPC

backend:RISC-V

llvm:transforms

vectorizers

Status: Open (in progress).

llvm/llvm-projectnumber 168886

#168886 In llvm/llvm-project;

· artagnon opened on Nov 20, 2025

[PowerPC] Add AMO load signed builtins

backend:PowerPC

backend:X86

clangClang issues not falling into any other categoryClang issues not falling into any other category

clang:codegenIR generation bugs: mangling, exceptions, etc.IR generation bugs: mangling, exceptions, etc.

clang:frontendLanguage frontend issues, e.g. anything involving "Sema"Language frontend issues, e.g. anything involving "Sema"

clang:headersHeaders provided by Clang, e.g. for intrinsicsHeaders provided by Clang, e.g. for intrinsics

Status: Open (in progress).

llvm/llvm-projectnumber 168747

#168747 In llvm/llvm-project;

· maryammo opened on Nov 19, 2025

[PowerPC] Add initial support for AMO load builtins

backend:PowerPC

backend:X86

clangClang issues not falling into any other categoryClang issues not falling into any other category

clang:frontendLanguage frontend issues, e.g. anything involving "Sema"Language frontend issues, e.g. anything involving "Sema"

clang:headersHeaders provided by Clang, e.g. for intrinsicsHeaders provided by Clang, e.g. for intrinsics

llvm:ir

Status: Open (in progress).

llvm/llvm-projectnumber 168746

#168746 In llvm/llvm-project;

· maryammo opened on Nov 19, 2025

Frontend dumps core consistently compiling rocblas in Debian/Ubuntu on <code>ppc64el</code>

backend:PowerPC

crashPrefer [crash-on-valid] or [crash-on-invalid]Prefer [crash-on-valid] or [crash-on-invalid]

llvm:SelectionDAGSelectionDAGISel as wellSelectionDAGISel as well

Status: Open.

Bug

#168727 In llvm/llvm-project;

· Hyask opened on Nov 19, 2025

[RegAlloc] Fix the terminal rule check for interfere with DstReg

backend:AArch64

backend:AMDGPU

backend:Hexagon

backend:NVPTX

backend:PowerPC

backend:RISC-V

backend:WebAssembly

backend:X86

llvm:codegen

llvm:globalisel

llvm:regalloc

Status: Merged (completed).

llvm/llvm-projectnumber 168661

#168661 In llvm/llvm-project;

· by hstk30-hw was closed on Nov 23, 2025

CodeGen: Add LibcallLoweringInfo analysis pass

backend:AArch64

backend:AMDGPU

backend:loongarch

backend:PowerPC

backend:RISC-V

backend:SPIR-V

backend:X86

clangClang issues not falling into any other categoryClang issues not falling into any other category

clang:codegenIR generation bugs: mangling, exceptions, etc.IR generation bugs: mangling, exceptions, etc.

llvm:analysisIncludes value tracking, cost tables and constant foldingIncludes value tracking, cost tables and constant folding

llvm:codegen

llvm:transforms

Status: Open (in progress).

llvm/llvm-projectnumber 168622

#168622 In llvm/llvm-project;

· arsenm opened on Nov 18, 2025