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[X86] getConstantFromPool - add basic handling for non-zero address offsets #127225

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[X86] getConstantFromPool - add basic handling for non-zero address offsets #127225

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65 changes: 44 additions & 21 deletions llvm/lib/Target/X86/X86FixupVectorConstants.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -139,20 +139,33 @@ static std::optional<APInt> extractConstantBits(const Constant *C) {
}

static std::optional<APInt> extractConstantBits(const Constant *C,
unsigned NumBits) {
int64_t ByteOffset) {
int64_t BitOffset = ByteOffset * 8;
if (std::optional<APInt> Bits = extractConstantBits(C))
return Bits->extractBits(Bits->getBitWidth() - BitOffset, BitOffset);
return std::nullopt;
}
Comment on lines 141 to +147
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@phoebewang phoebewang Feb 15, 2025

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Is there any more use of this function?

static std::optional<APInt>
extractConstantBits(const Constant *C, int64_t ByteOffset, unsigned NumBits) {
if (std::optional<APInt> Bits = extractConstantBits(C, ByteOffset))
return Bits->zextOrTrunc(NumBits);
return std::nullopt;
}

// Attempt to compute the splat width of bits data by normalizing the splat to
// remove undefs.
static std::optional<APInt> getSplatableConstant(const Constant *C,
int64_t ByteOffset,
unsigned SplatBitWidth) {
const Type *Ty = C->getType();
assert((Ty->getPrimitiveSizeInBits() % SplatBitWidth) == 0 &&
"Illegal splat width");

// TODO: Add ByteOffset support once we have test coverage.
if (ByteOffset != 0)
return std::nullopt;

if (std::optional<APInt> Bits = extractConstantBits(C))
if (Bits->isSplat(SplatBitWidth))
return Bits->trunc(SplatBitWidth);
Expand Down Expand Up @@ -241,10 +254,12 @@ static Constant *rebuildConstant(LLVMContext &Ctx, Type *SclTy,

// Attempt to rebuild a normalized splat vector constant of the requested splat
// width, built up of potentially smaller scalar values.
static Constant *rebuildSplatCst(const Constant *C, unsigned /*NumBits*/,
unsigned /*NumElts*/, unsigned SplatBitWidth) {
static Constant *rebuildSplatCst(const Constant *C, int64_t ByteOffset,
unsigned /*NumBits*/, unsigned /*NumElts*/,
unsigned SplatBitWidth) {
// TODO: Truncate to NumBits once ConvertToBroadcastAVX512 support this.
std::optional<APInt> Splat = getSplatableConstant(C, SplatBitWidth);
std::optional<APInt> Splat =
getSplatableConstant(C, ByteOffset, SplatBitWidth);
if (!Splat)
return nullptr;

Expand All @@ -263,16 +278,17 @@ static Constant *rebuildSplatCst(const Constant *C, unsigned /*NumBits*/,
return rebuildConstant(C->getContext(), SclTy, *Splat, NumSclBits);
}

static Constant *rebuildZeroUpperCst(const Constant *C, unsigned NumBits,
unsigned /*NumElts*/,
static Constant *rebuildZeroUpperCst(const Constant *C, int64_t ByteOffset,
unsigned NumBits, unsigned /*NumElts*/,
unsigned ScalarBitWidth) {
Type *SclTy = C->getType()->getScalarType();
unsigned NumSclBits = SclTy->getPrimitiveSizeInBits();
LLVMContext &Ctx = C->getContext();

if (NumBits > ScalarBitWidth) {
// Determine if the upper bits are all zero.
if (std::optional<APInt> Bits = extractConstantBits(C, NumBits)) {
if (std::optional<APInt> Bits =
extractConstantBits(C, ByteOffset, NumBits)) {
if (Bits->countLeadingZeros() >= (NumBits - ScalarBitWidth)) {
// If the original constant was made of smaller elements, try to retain
// those types.
Expand All @@ -290,14 +306,14 @@ static Constant *rebuildZeroUpperCst(const Constant *C, unsigned NumBits,
}

static Constant *rebuildExtCst(const Constant *C, bool IsSExt,
unsigned NumBits, unsigned NumElts,
unsigned SrcEltBitWidth) {
int64_t ByteOffset, unsigned NumBits,
unsigned NumElts, unsigned SrcEltBitWidth) {
unsigned DstEltBitWidth = NumBits / NumElts;
assert((NumBits % NumElts) == 0 && (NumBits % SrcEltBitWidth) == 0 &&
(DstEltBitWidth % SrcEltBitWidth) == 0 &&
(DstEltBitWidth > SrcEltBitWidth) && "Illegal extension width");

if (std::optional<APInt> Bits = extractConstantBits(C, NumBits)) {
if (std::optional<APInt> Bits = extractConstantBits(C, ByteOffset, NumBits)) {
assert((Bits->getBitWidth() / DstEltBitWidth) == NumElts &&
(Bits->getBitWidth() % DstEltBitWidth) == 0 &&
"Unexpected constant extension");
Expand All @@ -319,13 +335,15 @@ static Constant *rebuildExtCst(const Constant *C, bool IsSExt,

return nullptr;
}
static Constant *rebuildSExtCst(const Constant *C, unsigned NumBits,
unsigned NumElts, unsigned SrcEltBitWidth) {
return rebuildExtCst(C, true, NumBits, NumElts, SrcEltBitWidth);
static Constant *rebuildSExtCst(const Constant *C, int64_t ByteOffset,
unsigned NumBits, unsigned NumElts,
unsigned SrcEltBitWidth) {
return rebuildExtCst(C, true, ByteOffset, NumBits, NumElts, SrcEltBitWidth);
}
static Constant *rebuildZExtCst(const Constant *C, unsigned NumBits,
unsigned NumElts, unsigned SrcEltBitWidth) {
return rebuildExtCst(C, false, NumBits, NumElts, SrcEltBitWidth);
static Constant *rebuildZExtCst(const Constant *C, int64_t ByteOffset,
unsigned NumBits, unsigned NumElts,
unsigned SrcEltBitWidth) {
return rebuildExtCst(C, false, ByteOffset, NumBits, NumElts, SrcEltBitWidth);
}

bool X86FixupVectorConstantsPass::processInstruction(MachineFunction &MF,
Expand All @@ -344,7 +362,8 @@ bool X86FixupVectorConstantsPass::processInstruction(MachineFunction &MF,
int Op;
int NumCstElts;
int MemBitWidth;
std::function<Constant *(const Constant *, unsigned, unsigned, unsigned)>
std::function<Constant *(const Constant *, int64_t, unsigned, unsigned,
unsigned)>
RebuildConstant;
};
auto FixupConstant = [&](ArrayRef<FixupEntry> Fixups, unsigned RegBitWidth,
Expand All @@ -359,19 +378,23 @@ bool X86FixupVectorConstantsPass::processInstruction(MachineFunction &MF,
#endif
assert(MI.getNumOperands() >= (OperandNo + X86::AddrNumOperands) &&
"Unexpected number of operands!");
if (auto *C = X86::getConstantFromPool(MI, OperandNo)) {
int64_t ByteOffset = 0;
if (auto *C = X86::getConstantFromPool(MI, OperandNo, &ByteOffset)) {
unsigned CstBitWidth = C->getType()->getPrimitiveSizeInBits();
RegBitWidth = RegBitWidth ? RegBitWidth : CstBitWidth;
for (const FixupEntry &Fixup : Fixups) {
if (Fixup.Op) {
if (Fixup.Op && 0 <= ByteOffset &&
(RegBitWidth + (8 * ByteOffset)) <= CstBitWidth) {
// Construct a suitable constant and adjust the MI to use the new
// constant pool entry.
if (Constant *NewCst = Fixup.RebuildConstant(
C, RegBitWidth, Fixup.NumCstElts, Fixup.MemBitWidth)) {
if (Constant *NewCst =
Fixup.RebuildConstant(C, ByteOffset, RegBitWidth,
Fixup.NumCstElts, Fixup.MemBitWidth)) {
unsigned NewCPI =
CP->getConstantPoolIndex(NewCst, Align(Fixup.MemBitWidth / 8));
MI.setDesc(TII->get(Fixup.Op));
MI.getOperand(OperandNo + X86::AddrDisp).setIndex(NewCPI);
MI.getOperand(OperandNo + X86::AddrDisp).setOffset(0);
return true;
}
}
Expand Down
11 changes: 9 additions & 2 deletions llvm/lib/Target/X86/X86InstrInfo.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -3656,7 +3656,7 @@ int X86::getFirstAddrOperandIdx(const MachineInstr &MI) {
}

const Constant *X86::getConstantFromPool(const MachineInstr &MI,
unsigned OpNo) {
unsigned OpNo, int64_t *ByteOffset) {
assert(MI.getNumOperands() >= (OpNo + X86::AddrNumOperands) &&
"Unexpected number of operands!");

Expand All @@ -3665,7 +3665,11 @@ const Constant *X86::getConstantFromPool(const MachineInstr &MI,
return nullptr;

const MachineOperand &Disp = MI.getOperand(OpNo + X86::AddrDisp);
if (!Disp.isCPI() || Disp.getOffset() != 0)
if (!Disp.isCPI())
return nullptr;

int64_t Offset = Disp.getOffset();
if (Offset != 0 && !ByteOffset)
return nullptr;

ArrayRef<MachineConstantPoolEntry> Constants =
Expand All @@ -3677,6 +3681,9 @@ const Constant *X86::getConstantFromPool(const MachineInstr &MI,
if (ConstantEntry.isMachineConstantPoolEntry())
return nullptr;

if (ByteOffset)
*ByteOffset = Offset;

return ConstantEntry.Val.ConstVal;
}

Expand Down
5 changes: 4 additions & 1 deletion llvm/lib/Target/X86/X86InstrInfo.h
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Expand Up @@ -112,7 +112,10 @@ bool isX87Instruction(MachineInstr &MI);
int getFirstAddrOperandIdx(const MachineInstr &MI);

/// Find any constant pool entry associated with a specific instruction operand.
const Constant *getConstantFromPool(const MachineInstr &MI, unsigned OpNo);
/// By default returns null if the address offset is non-zero, but will return
/// the entry if \p ByteOffset is non-null to store the value.
const Constant *getConstantFromPool(const MachineInstr &MI, unsigned OpNo,
int64_t *ByteOffset = nullptr);

} // namespace X86

Expand Down
16 changes: 8 additions & 8 deletions llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-7.ll
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Expand Up @@ -239,9 +239,9 @@ define void @load_i32_stride7_vf2(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, ptr
; AVX512-FCP-NEXT: vpermi2d %xmm1, %xmm2, %xmm6
; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} xmm1 = [4,11,0,0]
; AVX512-FCP-NEXT: vpermps %zmm0, %zmm1, %zmm1
; AVX512-FCP-NEXT: vmovaps {{\.?LCPI[0-9]+_[0-9]+}}+16(%rip), %xmm2
; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} xmm2 = [5,12,14,15]
; AVX512-FCP-NEXT: vpermps %zmm0, %zmm2, %zmm2
; AVX512-FCP-NEXT: vmovaps {{\.?LCPI[0-9]+_[0-9]+}}+16(%rip), %xmm7
; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} xmm7 = [6,13,6,7]
; AVX512-FCP-NEXT: vpermps %zmm0, %zmm7, %zmm0
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@phoebewang phoebewang Feb 15, 2025

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I don't understand the code with the change

 if (Fixup.Op && 0 <= ByteOffset && (RegBitWidth + (8 * ByteOffset)) <= CstBitWidth) {

IIUC, the RegBitWidth here is 128, ByteOffset is 16 and CstBitWidth is 128. How it meets the condition here?
; AVX512-FCP-NEXT: vmovq %xmm3, (%rsi)
; AVX512-FCP-NEXT: vmovq %xmm4, (%rdx)
Expand Down Expand Up @@ -303,9 +303,9 @@ define void @load_i32_stride7_vf2(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, ptr
; AVX512DQ-FCP-NEXT: vpermi2d %xmm1, %xmm2, %xmm6
; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} xmm1 = [4,11,0,0]
; AVX512DQ-FCP-NEXT: vpermps %zmm0, %zmm1, %zmm1
; AVX512DQ-FCP-NEXT: vmovaps {{\.?LCPI[0-9]+_[0-9]+}}+16(%rip), %xmm2
; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} xmm2 = [5,12,14,15]
; AVX512DQ-FCP-NEXT: vpermps %zmm0, %zmm2, %zmm2
; AVX512DQ-FCP-NEXT: vmovaps {{\.?LCPI[0-9]+_[0-9]+}}+16(%rip), %xmm7
; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} xmm7 = [6,13,6,7]
; AVX512DQ-FCP-NEXT: vpermps %zmm0, %zmm7, %zmm0
; AVX512DQ-FCP-NEXT: vmovq %xmm3, (%rsi)
; AVX512DQ-FCP-NEXT: vmovq %xmm4, (%rdx)
Expand Down Expand Up @@ -367,9 +367,9 @@ define void @load_i32_stride7_vf2(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, ptr
; AVX512BW-FCP-NEXT: vpermi2d %xmm1, %xmm2, %xmm6
; AVX512BW-FCP-NEXT: vpmovsxbd {{.*#+}} xmm1 = [4,11,0,0]
; AVX512BW-FCP-NEXT: vpermps %zmm0, %zmm1, %zmm1
; AVX512BW-FCP-NEXT: vmovaps {{\.?LCPI[0-9]+_[0-9]+}}+16(%rip), %xmm2
; AVX512BW-FCP-NEXT: vpmovsxbd {{.*#+}} xmm2 = [5,12,14,15]
; AVX512BW-FCP-NEXT: vpermps %zmm0, %zmm2, %zmm2
; AVX512BW-FCP-NEXT: vmovaps {{\.?LCPI[0-9]+_[0-9]+}}+16(%rip), %xmm7
; AVX512BW-FCP-NEXT: vpmovsxbd {{.*#+}} xmm7 = [6,13,6,7]
; AVX512BW-FCP-NEXT: vpermps %zmm0, %zmm7, %zmm0
; AVX512BW-FCP-NEXT: vmovq %xmm3, (%rsi)
; AVX512BW-FCP-NEXT: vmovq %xmm4, (%rdx)
Expand Down Expand Up @@ -431,9 +431,9 @@ define void @load_i32_stride7_vf2(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, ptr
; AVX512DQ-BW-FCP-NEXT: vpermi2d %xmm1, %xmm2, %xmm6
; AVX512DQ-BW-FCP-NEXT: vpmovsxbd {{.*#+}} xmm1 = [4,11,0,0]
; AVX512DQ-BW-FCP-NEXT: vpermps %zmm0, %zmm1, %zmm1
; AVX512DQ-BW-FCP-NEXT: vmovaps {{\.?LCPI[0-9]+_[0-9]+}}+16(%rip), %xmm2
; AVX512DQ-BW-FCP-NEXT: vpmovsxbd {{.*#+}} xmm2 = [5,12,14,15]
; AVX512DQ-BW-FCP-NEXT: vpermps %zmm0, %zmm2, %zmm2
; AVX512DQ-BW-FCP-NEXT: vmovaps {{\.?LCPI[0-9]+_[0-9]+}}+16(%rip), %xmm7
; AVX512DQ-BW-FCP-NEXT: vpmovsxbd {{.*#+}} xmm7 = [6,13,6,7]
; AVX512DQ-BW-FCP-NEXT: vpermps %zmm0, %zmm7, %zmm0
; AVX512DQ-BW-FCP-NEXT: vmovq %xmm3, (%rsi)
; AVX512DQ-BW-FCP-NEXT: vmovq %xmm4, (%rdx)
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-8.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -226,7 +226,7 @@ define void @load_i32_stride8_vf2(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, ptr
; AVX512-FCP-NEXT: vmovaps (%rdi), %ymm4
; AVX512-FCP-NEXT: vunpcklps {{.*#+}} ymm5 = ymm4[0],ymm1[0],ymm4[1],ymm1[1],ymm4[4],ymm1[4],ymm4[5],ymm1[5]
; AVX512-FCP-NEXT: vextractf128 $1, %ymm5, %xmm5
; AVX512-FCP-NEXT: vmovaps {{\.?LCPI[0-9]+_[0-9]+}}+16(%rip), %xmm6
; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} xmm6 = [5,13,5,5]
; AVX512-FCP-NEXT: vpermps (%rdi), %zmm6, %zmm6
; AVX512-FCP-NEXT: vunpckhps {{.*#+}} ymm1 = ymm4[2],ymm1[2],ymm4[3],ymm1[3],ymm4[6],ymm1[6],ymm4[7],ymm1[7]
; AVX512-FCP-NEXT: vextractf128 $1, %ymm1, %xmm4
Expand Down Expand Up @@ -291,7 +291,7 @@ define void @load_i32_stride8_vf2(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, ptr
; AVX512DQ-FCP-NEXT: vmovaps (%rdi), %ymm4
; AVX512DQ-FCP-NEXT: vunpcklps {{.*#+}} ymm5 = ymm4[0],ymm1[0],ymm4[1],ymm1[1],ymm4[4],ymm1[4],ymm4[5],ymm1[5]
; AVX512DQ-FCP-NEXT: vextractf128 $1, %ymm5, %xmm5
; AVX512DQ-FCP-NEXT: vmovaps {{\.?LCPI[0-9]+_[0-9]+}}+16(%rip), %xmm6
; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} xmm6 = [5,13,5,5]
; AVX512DQ-FCP-NEXT: vpermps (%rdi), %zmm6, %zmm6
; AVX512DQ-FCP-NEXT: vunpckhps {{.*#+}} ymm1 = ymm4[2],ymm1[2],ymm4[3],ymm1[3],ymm4[6],ymm1[6],ymm4[7],ymm1[7]
; AVX512DQ-FCP-NEXT: vextractf128 $1, %ymm1, %xmm4
Expand Down Expand Up @@ -356,7 +356,7 @@ define void @load_i32_stride8_vf2(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, ptr
; AVX512BW-FCP-NEXT: vmovaps (%rdi), %ymm4
; AVX512BW-FCP-NEXT: vunpcklps {{.*#+}} ymm5 = ymm4[0],ymm1[0],ymm4[1],ymm1[1],ymm4[4],ymm1[4],ymm4[5],ymm1[5]
; AVX512BW-FCP-NEXT: vextractf128 $1, %ymm5, %xmm5
; AVX512BW-FCP-NEXT: vmovaps {{\.?LCPI[0-9]+_[0-9]+}}+16(%rip), %xmm6
; AVX512BW-FCP-NEXT: vpmovsxbd {{.*#+}} xmm6 = [5,13,5,5]
; AVX512BW-FCP-NEXT: vpermps (%rdi), %zmm6, %zmm6
; AVX512BW-FCP-NEXT: vunpckhps {{.*#+}} ymm1 = ymm4[2],ymm1[2],ymm4[3],ymm1[3],ymm4[6],ymm1[6],ymm4[7],ymm1[7]
; AVX512BW-FCP-NEXT: vextractf128 $1, %ymm1, %xmm4
Expand Down Expand Up @@ -421,7 +421,7 @@ define void @load_i32_stride8_vf2(ptr %in.vec, ptr %out.vec0, ptr %out.vec1, ptr
; AVX512DQ-BW-FCP-NEXT: vmovaps (%rdi), %ymm4
; AVX512DQ-BW-FCP-NEXT: vunpcklps {{.*#+}} ymm5 = ymm4[0],ymm1[0],ymm4[1],ymm1[1],ymm4[4],ymm1[4],ymm4[5],ymm1[5]
; AVX512DQ-BW-FCP-NEXT: vextractf128 $1, %ymm5, %xmm5
; AVX512DQ-BW-FCP-NEXT: vmovaps {{\.?LCPI[0-9]+_[0-9]+}}+16(%rip), %xmm6
; AVX512DQ-BW-FCP-NEXT: vpmovsxbd {{.*#+}} xmm6 = [5,13,5,5]
; AVX512DQ-BW-FCP-NEXT: vpermps (%rdi), %zmm6, %zmm6
; AVX512DQ-BW-FCP-NEXT: vunpckhps {{.*#+}} ymm1 = ymm4[2],ymm1[2],ymm4[3],ymm1[3],ymm4[6],ymm1[6],ymm4[7],ymm1[7]
; AVX512DQ-BW-FCP-NEXT: vextractf128 $1, %ymm1, %xmm4
Expand Down
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