[CodeGen] Add assertion to MachineBasicBlock::addLiveIn and friends #140527
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Assert that the MCRegister passed into addLiveIn, removeLiveIn, isLiveIn and computeRegisterLiveness is physical.
jayfoad commented May 19, 2025
llvm/lib/CodeGen/RegAllocFast.cpp Outdated
Comment on lines 506 to 507
| if (Op.isReg() && Op.getReg() != MCRegister::NoRegister && | ||
| MBB->isLiveIn(Op.getReg())) |
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I am not convinced this is the right place to do this. It avoids failures in a couple of MIR tests which have $noreg in the input:
Failed Tests (2): LLVM :: CodeGen/X86/callbr-asm-outputs-regallocfast.mir LLVM :: CodeGen/X86/regallocfast-callbr-asm-spills-after-reload.mir 
topperc reviewed May 19, 2025
llvm/lib/CodeGen/RegAllocFast.cpp Outdated
| MFI->isSpillSlotObjectIndex(FI)) | ||
| for (const auto &Op : MI.operands()) | ||
| if (Op.isReg() && MBB->isLiveIn(Op.getReg())) | ||
| if (Op.isReg() && Op.getReg() != MCRegister::NoRegister && |
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Op.getReg() or Op.getReg().isValid()
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Assert that the MCRegister passed into addLiveIn, removeLiveIn, isLiveIn
and computeRegisterLiveness is physical.