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@woruyu woruyu commented Jul 14, 2025

Summary

This PR resolves #147694

@llvmbot llvmbot added backend:PowerPC llvm:SelectionDAG SelectionDAGISel as well labels Jul 14, 2025
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llvmbot commented Jul 14, 2025

@llvm/pr-subscribers-llvm-selectiondag

Author: woruyu (woruyu)

Changes

Summary

This PR resolves #147694


Full diff: https://github.com/llvm/llvm-project/pull/148617.diff

2 Files Affected:

  • (modified) llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (+1)
  • (modified) llvm/test/CodeGen/PowerPC/copysignl.ll (+23-6)
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index 58be4fb7e8331..3656500ddf5ff 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -5620,6 +5620,7 @@ bool SelectionDAG::canCreateUndefOrPoison(SDValue Op, const APInt &DemandedElts, case ISD::FMUL: case ISD::FDIV: case ISD::FREM: + case ISD::FCOPYSIGN: // No poison except from flags (which is handled above) return false; diff --git a/llvm/test/CodeGen/PowerPC/copysignl.ll b/llvm/test/CodeGen/PowerPC/copysignl.ll index 40ed3d803094f..9fdfb8fc548d1 100644 --- a/llvm/test/CodeGen/PowerPC/copysignl.ll +++ b/llvm/test/CodeGen/PowerPC/copysignl.ll @@ -20,6 +20,23 @@ entry: ret double %conv } +define double @foo_d_ll_freeze(ppc_fp128 %a, ppc_fp128 %b) #0 { +; CHECK-LABEL: foo_d_ll_freeze: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: fcpsgn 1, 3, 1 +; CHECK-NEXT: blr +; +; CHECK-VSX-LABEL: foo_d_ll_freeze: +; CHECK-VSX: # %bb.0: # %entry +; CHECK-VSX-NEXT: xscpsgndp 1, 3, 1 +; CHECK-VSX-NEXT: blr +entry: + %call = tail call ppc_fp128 @copysignl(ppc_fp128 %a, ppc_fp128 %b) #0 + %freeze = freeze ppc_fp128 %call + %conv = fptrunc ppc_fp128 %freeze to double + ret double %conv +} + declare ppc_fp128 @copysignl(ppc_fp128, ppc_fp128) #0 define double @foo_dl(double %a, ppc_fp128 %b) #0 { @@ -46,9 +63,9 @@ define ppc_fp128 @foo_ll(double %a, ppc_fp128 %b) #0 { ; CHECK-NEXT: mflr 0 ; CHECK-NEXT: stdu 1, -112(1) ; CHECK-NEXT: fmr 3, 2 -; CHECK-NEXT: addis 3, 2, .LCPI2_0@toc@ha +; CHECK-NEXT: addis 3, 2, .LCPI3_0@toc@ha ; CHECK-NEXT: std 0, 128(1) -; CHECK-NEXT: lfs 2, .LCPI2_0@toc@l(3) +; CHECK-NEXT: lfs 2, .LCPI3_0@toc@l(3) ; CHECK-NEXT: bl copysignl ; CHECK-NEXT: nop ; CHECK-NEXT: addi 1, 1, 112 @@ -81,9 +98,9 @@ define ppc_fp128 @foo_ld(double %a, double %b) #0 { ; CHECK-NEXT: mflr 0 ; CHECK-NEXT: stdu 1, -112(1) ; CHECK-NEXT: fmr 3, 2 -; CHECK-NEXT: addis 3, 2, .LCPI3_0@toc@ha +; CHECK-NEXT: addis 3, 2, .LCPI4_0@toc@ha ; CHECK-NEXT: std 0, 128(1) -; CHECK-NEXT: lfs 2, .LCPI3_0@toc@l(3) +; CHECK-NEXT: lfs 2, .LCPI4_0@toc@l(3) ; CHECK-NEXT: bl copysignl ; CHECK-NEXT: nop ; CHECK-NEXT: addi 1, 1, 112 @@ -117,9 +134,9 @@ define ppc_fp128 @foo_lf(double %a, float %b) #0 { ; CHECK-NEXT: mflr 0 ; CHECK-NEXT: stdu 1, -112(1) ; CHECK-NEXT: fmr 3, 2 -; CHECK-NEXT: addis 3, 2, .LCPI4_0@toc@ha +; CHECK-NEXT: addis 3, 2, .LCPI5_0@toc@ha ; CHECK-NEXT: std 0, 128(1) -; CHECK-NEXT: lfs 2, .LCPI4_0@toc@l(3) +; CHECK-NEXT: lfs 2, .LCPI5_0@toc@l(3) ; CHECK-NEXT: bl copysignl ; CHECK-NEXT: nop ; CHECK-NEXT: addi 1, 1, 112 
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llvmbot commented Jul 14, 2025

@llvm/pr-subscribers-backend-powerpc

Author: woruyu (woruyu)

Changes

Summary

This PR resolves #147694


Full diff: https://github.com/llvm/llvm-project/pull/148617.diff

2 Files Affected:

  • (modified) llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (+1)
  • (modified) llvm/test/CodeGen/PowerPC/copysignl.ll (+23-6)
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index 58be4fb7e8331..3656500ddf5ff 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -5620,6 +5620,7 @@ bool SelectionDAG::canCreateUndefOrPoison(SDValue Op, const APInt &DemandedElts, case ISD::FMUL: case ISD::FDIV: case ISD::FREM: + case ISD::FCOPYSIGN: // No poison except from flags (which is handled above) return false; diff --git a/llvm/test/CodeGen/PowerPC/copysignl.ll b/llvm/test/CodeGen/PowerPC/copysignl.ll index 40ed3d803094f..9fdfb8fc548d1 100644 --- a/llvm/test/CodeGen/PowerPC/copysignl.ll +++ b/llvm/test/CodeGen/PowerPC/copysignl.ll @@ -20,6 +20,23 @@ entry: ret double %conv } +define double @foo_d_ll_freeze(ppc_fp128 %a, ppc_fp128 %b) #0 { +; CHECK-LABEL: foo_d_ll_freeze: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: fcpsgn 1, 3, 1 +; CHECK-NEXT: blr +; +; CHECK-VSX-LABEL: foo_d_ll_freeze: +; CHECK-VSX: # %bb.0: # %entry +; CHECK-VSX-NEXT: xscpsgndp 1, 3, 1 +; CHECK-VSX-NEXT: blr +entry: + %call = tail call ppc_fp128 @copysignl(ppc_fp128 %a, ppc_fp128 %b) #0 + %freeze = freeze ppc_fp128 %call + %conv = fptrunc ppc_fp128 %freeze to double + ret double %conv +} + declare ppc_fp128 @copysignl(ppc_fp128, ppc_fp128) #0 define double @foo_dl(double %a, ppc_fp128 %b) #0 { @@ -46,9 +63,9 @@ define ppc_fp128 @foo_ll(double %a, ppc_fp128 %b) #0 { ; CHECK-NEXT: mflr 0 ; CHECK-NEXT: stdu 1, -112(1) ; CHECK-NEXT: fmr 3, 2 -; CHECK-NEXT: addis 3, 2, .LCPI2_0@toc@ha +; CHECK-NEXT: addis 3, 2, .LCPI3_0@toc@ha ; CHECK-NEXT: std 0, 128(1) -; CHECK-NEXT: lfs 2, .LCPI2_0@toc@l(3) +; CHECK-NEXT: lfs 2, .LCPI3_0@toc@l(3) ; CHECK-NEXT: bl copysignl ; CHECK-NEXT: nop ; CHECK-NEXT: addi 1, 1, 112 @@ -81,9 +98,9 @@ define ppc_fp128 @foo_ld(double %a, double %b) #0 { ; CHECK-NEXT: mflr 0 ; CHECK-NEXT: stdu 1, -112(1) ; CHECK-NEXT: fmr 3, 2 -; CHECK-NEXT: addis 3, 2, .LCPI3_0@toc@ha +; CHECK-NEXT: addis 3, 2, .LCPI4_0@toc@ha ; CHECK-NEXT: std 0, 128(1) -; CHECK-NEXT: lfs 2, .LCPI3_0@toc@l(3) +; CHECK-NEXT: lfs 2, .LCPI4_0@toc@l(3) ; CHECK-NEXT: bl copysignl ; CHECK-NEXT: nop ; CHECK-NEXT: addi 1, 1, 112 @@ -117,9 +134,9 @@ define ppc_fp128 @foo_lf(double %a, float %b) #0 { ; CHECK-NEXT: mflr 0 ; CHECK-NEXT: stdu 1, -112(1) ; CHECK-NEXT: fmr 3, 2 -; CHECK-NEXT: addis 3, 2, .LCPI4_0@toc@ha +; CHECK-NEXT: addis 3, 2, .LCPI5_0@toc@ha ; CHECK-NEXT: std 0, 128(1) -; CHECK-NEXT: lfs 2, .LCPI4_0@toc@l(3) +; CHECK-NEXT: lfs 2, .LCPI5_0@toc@l(3) ; CHECK-NEXT: bl copysignl ; CHECK-NEXT: nop ; CHECK-NEXT: addi 1, 1, 112 
@RKSimon RKSimon self-requested a review July 14, 2025 12:44
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LGTM

@RKSimon RKSimon merged commit b22b103 into llvm:main Jul 14, 2025
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backend:PowerPC llvm:SelectionDAG SelectionDAGISel as well

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