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Pull requests: llvm/llvm-project
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RuntimeLibcalls: Remove incorrect sincospi from most targets backend:AArch64 backend:ARM backend:PowerPC backend:X86 llvm:ir llvm:SelectionDAG SelectionDAGISel as well
#166982 by arsenm was merged Nov 10, 2025 Loading…
[CodeGenPrepare] sinkCmpExpression - don't sink larger than legal integer comparisons backend:ARM backend:RISC-V backend:X86 llvm:codegen llvm:transforms
#166778 by RKSimon was merged Nov 10, 2025 Loading…
[ARM] Prevent stack argument overwrite during tail calls backend:ARM
#166492 by dtellenbach was merged Nov 12, 2025 Loading…
[llvm] Emit canonical linkage correct function symbol backend:ARM backend:X86 llvm:codegen
#166487 by Prabhuk was merged Nov 5, 2025 Loading…
[ARM] Use TargetMachine over Subtarget in ARMAsmPrinter backend:ARM
#166329 by davemgreen was merged Nov 12, 2025 Loading…
[llvm] Use conventional enum declarations (NFC) backend:AArch64 backend:AMDGPU backend:ARM backend:MIPS backend:WebAssembly backend:X86 llvm:adt
#166318 by kazutakahirata was merged Nov 4, 2025 Loading…
DAG: Merge all sincos_stret emission code into legalizer backend:AArch64 backend:ARM backend:X86 llvm:codegen llvm:ir llvm:SelectionDAG SelectionDAGISel as well llvm:transforms
#166295 by arsenm was merged Nov 4, 2025 Loading…
ARM: Add watchos run line to llvm.sincos test backend:ARM
#166271 by arsenm was merged Nov 4, 2025 Loading…
ARM: Add more ABIs to llvm.sincos test backend:ARM
#166264 by arsenm was merged Nov 4, 2025 Loading…
Revert "ARM: Remove unnecessary manual ABI lowering for sincos_stret (#166040)" backend:ARM
#166262 by arsenm was merged Nov 4, 2025 Loading…
ARM: Remove unnecessary manual ABI lowering for sincos_stret backend:ARM
#166040 by arsenm was merged Nov 3, 2025 Loading…
CodeGen: Remove target hook for terminal rule backend:AArch64 backend:AMDGPU backend:ARM backend:Hexagon backend:NVPTX backend:PowerPC backend:RISC-V backend:SystemZ backend:WebAssembly backend:X86 llvm:codegen llvm:regalloc
#165962 by arsenm was merged Nov 12, 2025 Loading…
RISCV: Enable terminal rule backend:AArch64 backend:ARM backend:Hexagon backend:RISC-V backend:X86 llvm:regalloc llvm:transforms
#165961 by arsenm was merged Nov 11, 2025 Loading…
ARM: Enable terminal rule backend:ARM llvm:regalloc
#165958 by arsenm was merged Nov 10, 2025 Loading…
[MC] Remove SMRange(std::nullopt_t) backend:ARM backend:X86 llvm:mc Machine (object) code llvm:support tablegen testing-tools
#165832 by kazutakahirata was merged Oct 31, 2025 Loading…
[GlobalMerge]Prefer use global-merge-max-offset instead of the target-specific constant offset. backend:AArch64 backend:ARM llvm:codegen
#165591 by hstk30-hw was merged Nov 17, 2025 Loading…
[clang] Refactor to remove clangDriver dependency from clangFrontend and flangFrontend backend:AArch64 backend:AMDGPU backend:ARM backend:CSKY backend:Hexagon backend:loongarch backend:MIPS backend:PowerPC backend:RISC-V backend:Sparc backend:SPIR-V backend:SystemZ backend:X86 bazel "Peripheral" support tier build system: utils/bazel clang:as-a-library libclang and C++ API clang:driver 'clang' and 'clang++' user-facing binaries. Not 'clang-cl' clang:frontend Language frontend issues, e.g. anything involving "Sema" clang:modules C++20 modules and Clang Header Modules clang:openmp OpenMP related changes to Clang clang Clang issues not falling into any other category clang-tools-extra clangd flang:driver flang Flang issues not falling into any other category lldb llvm:mc Machine (object) code
#165277 by naveen-seth was merged Nov 23, 2025 Loading…
ARM: Avoid doing strncmp on libcall name backend:ARM
#165203 by arsenm was merged Oct 31, 2025 Loading…
ExpandFp: Require RuntimeLibcallsInfo analysis backend:AArch64 backend:AMDGPU backend:ARM backend:WebAssembly backend:X86 llvm:analysis Includes value tracking, cost tables and constant folding llvm:codegen llvm:ir llvm:SelectionDAG SelectionDAGISel as well llvm:transforms LTO Link time optimization (regular/full LTO or ThinLTO) tablegen
#165197 by arsenm was closed Nov 18, 2025 Loading…
Analysis: Add RuntimeLibcall analysis pass backend:AArch64 backend:AMDGPU backend:ARM backend:WebAssembly backend:X86 llvm:analysis Includes value tracking, cost tables and constant folding llvm:codegen llvm:ir llvm:SelectionDAG SelectionDAGISel as well llvm:transforms LTO Link time optimization (regular/full LTO or ThinLTO) tablegen
#165196 by arsenm was merged Nov 5, 2025 Loading…
DAG: Consider __sincos_stret when deciding to form fsincos backend:ARM backend:X86 llvm:codegen llvm:SelectionDAG SelectionDAGISel as well
#165169 by arsenm was merged Oct 28, 2025 Loading…
[llvm] Use iterator_range<T>(Container &&) (NFC) backend:ARM backend:DirectX backend:X86 debuginfo llvm:binary-utilities llvm:globalisel llvm:ir tablegen
#165117 by kazutakahirata was merged Oct 25, 2025 Loading…
[Target] Add "override" where appropriate (NFC) backend:AArch64 backend:AMDGPU backend:ARM backend:MIPS backend:RISC-V backend:Sparc backend:SPIR-V backend:SystemZ backend:WebAssembly backend:X86
#165083 by kazutakahirata was merged Oct 25, 2025 Loading…
RuntimeLibcalls: Split lowering decisions into LibcallLoweringInfo backend:AArch64 backend:ARM backend:WebAssembly backend:X86 llvm:codegen llvm:ir llvm:transforms LTO Link time optimization (regular/full LTO or ThinLTO) tablegen
#164987 by arsenm was merged Nov 5, 2025 Loading…
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