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Pull requests: llvm/llvm-project
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[DAGCombiner] Don't optimize insert_vector_elt into shuffle if implicit truncation exists backend:RISC-V llvm:SelectionDAG SelectionDAGISel as well
#169022 by XChy was merged Nov 21, 2025 Loading…
[RISCV] Combine vslide{up,down} x, poison -> x backend:RISC-V
#169013 by lukel97 was merged Nov 24, 2025 Loading…
[RISCV] Use SDT_RISCVIntUnaryOpW for RISCVISD::ABSW type profile. NFC backend:RISC-V
#168932 by topperc was merged Nov 20, 2025 Loading…
[RISCV] Only add v2i32 to GPR regclass in the RV64 hardware mode. backend:RISC-V
#168930 by topperc was merged Nov 20, 2025 Loading…
[VPlan] Drop poison-generating flags on induction trunc backend:RISC-V llvm:analysis Includes value tracking, cost tables and constant folding llvm:transforms vectorizers
#168922 by artagnon was merged Nov 21, 2025 Loading…
[RISCV] Do not write .s file in a test backend:RISC-V
#168865 by mgudim was merged Nov 20, 2025 Loading…
[RISCV] Add segmented tunes to tt-ascalon-d8 backend:RISC-V
#168800 by ppenzin was merged Nov 25, 2025 Loading…
[CFIInserter] Turn a reachable llvm_unreachable into a report_fatal_error. backend:RISC-V backend:X86 llvm:codegen
#168777 by topperc was merged Nov 20, 2025 Loading…
[RISCV] Fix CFI Multiple Locations Test backend:RISC-V
#168772 by lenary was merged Nov 19, 2025 Loading…
Reapply "[LV] Use ExtractLane(LastActiveLane, V) live outs when tail-folding. (#149042)" backend:RISC-V llvm:transforms vectorizers
#168738 by lukel97 was closed Nov 26, 2025 Loading…
[RISCV] Only reduce VLs of instructions with demanded VLs backend:RISC-V
#168693 by lukel97 was merged Nov 20, 2025 Loading…
[TTI] Use MemIntrinsicCostAttributes for getExpandCompressMemoryOpCost backend:RISC-V llvm:analysis Includes value tracking, cost tables and constant folding
#168677 by arcbbb was merged Nov 28, 2025 Loading…
[RISCV] Incorporate scalar addends to extend vector multiply accumulate chains backend:RISC-V
#168660 by bababuck was merged Nov 21, 2025 Loading…
CodeGen: Move libcall lowering configuration to subtarget backend:AArch64 backend:AMDGPU backend:ARM backend:DirectX backend:Hexagon backend:Lanai backend:loongarch backend:MIPS backend:MSP430 backend:NVPTX backend:PowerPC backend:RISC-V backend:Sparc backend:SPIR-V backend:SystemZ backend:WebAssembly backend:X86 backend:Xtensa llvm:codegen llvm:SelectionDAG SelectionDAGISel as well
#168621 by arsenm was merged Nov 25, 2025 Loading…
CodeGen: Add subtarget to TargetLoweringBase constructor backend:AArch64 backend:AMDGPU backend:ARM backend:DirectX backend:Hexagon backend:Lanai backend:loongarch backend:MIPS backend:MSP430 backend:NVPTX backend:PowerPC backend:RISC-V backend:Sparc backend:SPIR-V backend:SystemZ backend:WebAssembly backend:X86 backend:Xtensa llvm:codegen llvm:SelectionDAG SelectionDAGISel as well
#168620 by arsenm was merged Nov 19, 2025 Loading…
[RISCV] Convert -mtune=generic to generic-rv32/rv64 in RISCVSubtarget::initializeSubtargetDependencies. backend:RISC-V
#168612 by topperc was merged Nov 19, 2025 Loading…
[GISel][RISCV] Compute CTPOP of small odd-sized integer correctly backend:RISC-V llvm:globalisel
#168559 by XChy was merged Nov 18, 2025 Loading…
[RISCV] Make XFAIL test UNSUPPORTED. backend:RISC-V
#168525 by mgudim was merged Nov 18, 2025 Loading…
[RISCV] Remove Match_InvalidXSfmmVType. NFC backend:RISC-V
#168465 by topperc was merged Nov 18, 2025 Loading…
[RISCV] Remove unused function declaration. NFC backend:RISC-V
#168459 by topperc was merged Nov 18, 2025 Loading…
[RISCV] Reduce minimum VL needed for vslidedown.vx in RISCVVLOptimizer backend:RISC-V
#168392 by lukel97 was merged Nov 18, 2025 Loading…
[RISCV][NewPM] Port RISCVCodeGenPrepare to the new pass manager backend:RISC-V
#168381 by asb was merged Nov 19, 2025 Loading…
[VPlan] Hoist predicated loads with complementary masks. backend:RISC-V llvm:analysis Includes value tracking, cost tables and constant folding llvm:transforms vectorizers
#168373 by fhahn was merged Nov 26, 2025 Loading…
Reland [VPlan] Expand WidenInt inductions with nuw/nsw backend:RISC-V flang:fir-hlfir flang Flang issues not falling into any other category llvm:transforms vectorizers
#168354 by artagnon was merged Nov 17, 2025 Loading…
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