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Pull requests: llvm/llvm-project
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CodeGen: Remove MachineFunction argument from getRegClass backend:AArch64 backend:AMDGPU backend:ARM backend:Hexagon backend:loongarch backend:MIPS backend:MSP430 backend:PowerPC backend:RISC-V backend:Sparc backend:SystemZ backend:WebAssembly backend:X86 llvm:codegen llvm:globalisel llvm:regalloc llvm:SelectionDAG SelectionDAGISel as well
#158188 by arsenm was merged Sep 12, 2025 Loading…
CodeGen: Remove MachineFunction argument from getPointerRegClass backend:AArch64 backend:AMDGPU backend:ARM backend:Hexagon backend:loongarch backend:MIPS backend:MSP430 backend:PowerPC backend:RISC-V backend:Sparc backend:SystemZ backend:WebAssembly backend:X86 llvm:codegen llvm:globalisel
#158185 by arsenm was merged Sep 12, 2025 Loading…
[NFC][DecoderEmitter] Code cleanup in
DecoderEmitter::emitTable backend:CSKY backend:Hexagon backend:Lanai backend:loongarch backend:PowerPC backend:SystemZ backend:Xtensa tablegen #158014 by jurahul was merged Sep 16, 2025 Loading…
[VectorCombine] Fix scalarizeExtExtract for big-endian backend:PowerPC llvm:transforms llvm:vectorcombine vectorizers
#157962 by uyoyo0 was merged Sep 15, 2025 Loading…
[PowerPC] Exploit xxeval instruction for operations of the form ternary(A,X, XOR(B,C)) and ternary(A,X, OR(B,C)) backend:PowerPC
#157909 by tonykuttai was merged Sep 22, 2025 Loading…
[PowerPC] Implement VSX Vector Integer Arithmetic Instructions backend:PowerPC
#157903 by lei137 was closed Sep 12, 2025 Loading…
[PowerPC] Implement AES Acceleration Instructions backend:PowerPC
#157725 by lei137 was merged Sep 23, 2025 Loading…
[VPlan] Keep common flags during CSE. backend:PowerPC llvm:transforms vectorizers
#157664 by fhahn was merged Sep 10, 2025 Loading…
[PowerPC] Emit lxvkq and vsrq instructions for build vector patterns backend:PowerPC
#157625 by tonykuttai was merged Oct 15, 2025 Loading…
[llvm] Move data layout string computation to TargetParser backend:AArch64 backend:AMDGPU backend:ARC backend:ARM backend:CSKY backend:DirectX backend:Hexagon backend:Lanai backend:loongarch backend:m68k backend:MIPS backend:MSP430 backend:NVPTX backend:PowerPC backend:RISC-V backend:Sparc backend:SPIR-V backend:SystemZ backend:WebAssembly backend:X86 backend:Xtensa llvm:ir
#157612 by rnk was merged Sep 11, 2025 Loading…
[LICM] Sink unused l-invariant loads in preheader. backend:AMDGPU backend:PowerPC clang:openmp OpenMP related changes to Clang clang Clang issues not falling into any other category llvm:transforms
#157559 by VigneshwarJ was merged Oct 30, 2025 Loading…
[VPlan] Create epilogue minimum iteration check in VPlan. backend:PowerPC llvm:transforms vectorizers
#157545 by fhahn was merged Sep 25, 2025 Loading…
PPC: Use StringRef for subtarget constructor arguments backend:PowerPC
#157409 by arsenm was merged Sep 8, 2025 Loading…
PPC: Remove TargetTriple from PPCSubtarget backend:PowerPC
#157404 by arsenm was merged Sep 8, 2025 Loading…
CodeGen: Pass SubtargetInfo to TargetGenInstrInfo constructors backend:AArch64 backend:AMDGPU backend:ARC backend:ARM backend:CSKY backend:DirectX backend:Hexagon backend:Lanai backend:loongarch backend:m68k backend:MIPS backend:MSP430 backend:NVPTX backend:PowerPC backend:RISC-V backend:Sparc backend:SPIR-V backend:SystemZ backend:WebAssembly backend:X86 backend:Xtensa llvm:codegen tablegen
#157337 by arsenm was merged Sep 8, 2025 Loading…
[SCEVExp] Add helper to clean up dead instructions after expansion. backend:PowerPC backend:RISC-V llvm:transforms vectorizers
#157308 by fhahn was merged Sep 8, 2025 Loading…
[InstSimplify] Simplify extractvalue (umul_with_overflow(x, 1)). backend:PowerPC backend:RISC-V llvm:analysis Includes value tracking, cost tables and constant folding llvm:instcombine Covers the InstCombine, InstSimplify and AggressiveInstCombine passes llvm:transforms
#157307 by fhahn was merged Sep 7, 2025 Loading…
PPC: Split 64bit target feature into 64bit and 64bit-support backend:PowerPC
#157206 by arsenm was merged Sep 16, 2025 Loading…
PPC: Fix missing const on TargetInstrInfo's subtarget reference backend:PowerPC
#157201 by arsenm was merged Sep 6, 2025 Loading…
[Clang][PowerPC] Add __dmr2048 type and DMF crypto builtins backend:PowerPC clang:codegen IR generation bugs: mangling, exceptions, etc. clang:frontend Language frontend issues, e.g. anything involving "Sema" clang:modules C++20 modules and Clang Header Modules clang Clang issues not falling into any other category lldb
#157152 by maryammo was merged Sep 30, 2025 Loading…
[PowerPC][NFC] Apply clang-format to PPCInstrFuture.td backend:PowerPC
#157135 by lei137 was merged Sep 5, 2025 Loading…
PPC: Move definitions of predicates with features backend:PowerPC
#157058 by arsenm was merged Sep 16, 2025 Loading…
[NFC][PowerPC] adding the options for register names and VSR to VR backend:PowerPC
#157007 by Himadhith was merged Sep 5, 2025 Loading…
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