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Pull requests: llvm/llvm-project
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[VPlan] Use predicated intrinsics for trapping divisors backend:RISC-V llvm:transforms vectorizers
#154076 opened Aug 18, 2025 by lukel97 Loading…
[IROutliner] Prevent propagating interrupt attribute backend:RISC-V llvm:transforms
#153985 opened Aug 16, 2025 by lenary Loading…
[SLP] Prefer copyable vectorization over alternate opcodes backend:RISC-V backend:SystemZ llvm:transforms vectorizers
#153684 opened Aug 14, 2025 by alexey-bataev Loading…
[RISCV] Use LD_RV32/SD_RV32 for spills and reloads when Zilsd is enabled backend:RISC-V
#153595 opened Aug 14, 2025 by svs-quic Loading…
[SLP] Support for copyables in the reduced values backend:RISC-V llvm:transforms vectorizers
#153589 opened Aug 14, 2025 by alexey-bataev Loading…
[SLPVectorizer] Widen strided loads. backend:RISC-V llvm:transforms vectorizers
#153074 opened Aug 11, 2025 by mgudim Loading…
[TTI] Remove hasActiveVectorLength hook. NFC backend:RISC-V llvm:analysis Includes value tracking, cost tables and constant folding llvm:ir llvm:transforms vectorizers
#152977 opened Aug 11, 2025 by lukel97 Loading…
[SelectionDAG] Add SelectionDAGISel as well
f16 soft promotion for lrint and lround backend:AArch64 backend:ARM backend:loongarch backend:MIPS backend:MSP430 backend:PowerPC backend:RISC-V backend:WebAssembly backend:X86 llvm:SelectionDAG #152684 opened Aug 8, 2025 by tgross35 Loading…
Clang AST updates for more details backend:RISC-V clang:frontend Language frontend issues, e.g. anything involving "Sema" clang:openmp OpenMP related changes to Clang clang Clang issues not falling into any other category HLSL HLSL Language Support
#152372 opened Aug 6, 2025 by sei-nreimer Loading…
[clang][RISCV][Zicfilp] Force user to use Language frontend issues, e.g. anything involving "Sema" clang Clang issues not falling into any other category
-mcf-branch-label-scheme=unlabeled backend:RISC-V clang:frontend #152122 opened Aug 5, 2025 by mylai-mtk Loading…
[RISCV][Zicfilp] Enable Zicfilp CFI compiler behaviors by looking at module flags backend:RISC-V llvm:support
#152121 opened Aug 5, 2025 by mylai-mtk Loading…
Reapply [X86][ARM] Invert the low bit to get the inverse predicate (NFC) backend:ARM backend:RISC-V backend:X86
#152053 opened Aug 4, 2025 by AZero13 Loading…
[RISCV] custom scmp(x,0) and scmp(0,x) lowering for RVV backend:RISC-V
#151753 opened Aug 1, 2025 by camel-cdr Loading…
[RISC-V]Implement -m{,no}fence-tso backend:RISC-V clang:driver 'clang' and 'clang++' user-facing binaries. Not 'clang-cl' clang Clang issues not falling into any other category
#151638 opened Aug 1, 2025 by ChunyuLiao Loading…
[SLP]Initial support for non-power-of-2 vectorization backend:RISC-V backend:SystemZ llvm:transforms vectorizers
#151530 opened Jul 31, 2025 by alexey-bataev Loading…
[RISCV] Mark More Relocs as Relaxable backend:RISC-V BOLT llvm:mc Machine (object) code
#151422 opened Jul 30, 2025 by lenary Loading…
[RISCV] Put Large Code Model Constant Pools in .text backend:Lanai backend:MIPS backend:NVPTX backend:RISC-V backend:SPIR-V backend:X86 llvm:codegen
#151393 opened Jul 30, 2025 by lenary Loading…
[VPlan] Enable vectorization of early-exit loops with unit-stride fault-only-first loads backend:RISC-V llvm:analysis Includes value tracking, cost tables and constant folding llvm:transforms vectorizers
#151300 opened Jul 30, 2025 by arcbbb Loading…
[RISCV][GlobalISel][TargetLowering] Change SSUBO to do (LHS < RHS) XOR (RESULT < 0) backend:AMDGPU backend:RISC-V backend:X86 llvm:globalisel llvm:SelectionDAG SelectionDAGISel as well
#150872 opened Jul 28, 2025 by AZero13 Loading…
[SLP] Loop aware cost model/tree building backend:AMDGPU backend:RISC-V backend:SystemZ llvm:transforms vectorizers
#150450 opened Jul 24, 2025 by alexey-bataev Loading…
[VPlan] Remove VPBlendRecipe and replace with select VPInstructions backend:RISC-V llvm:transforms vectorizers
#150369 opened Jul 24, 2025 by lukel97 Loading…
[FMV][AArch64] Allow user to override version priority. backend:AArch64 backend:ARM backend:RISC-V clang:codegen IR generation bugs: mangling, exceptions, etc. clang:frontend Language frontend issues, e.g. anything involving "Sema" clang Clang issues not falling into any other category llvm:analysis Includes value tracking, cost tables and constant folding llvm:transforms tablegen
#150267 opened Jul 23, 2025 by labrinea Loading…
[clang] Rename files that MacOS libtool warns about (NFC) backend:AMDGPU backend:DirectX backend:RISC-V clang:codegen IR generation bugs: mangling, exceptions, etc. clang Clang issues not falling into any other category
#150054 opened Jul 22, 2025 by jthackray Loading…
[AArch64] Enable preferZeroCompareBranch for AArch64 when we don't have fused cmp+br backend:AArch64 backend:ARM backend:RISC-V backend:SystemZ llvm:codegen
#150045 opened Jul 22, 2025 by AZero13 Loading…
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