- Notifications
You must be signed in to change notification settings - Fork 15.3k
Pull requests: llvm/llvm-project
Author
Label
Projects
Milestones
Reviews
Assignee
Sort
Pull requests list
[AMDGPU][MachineVerifier] test failures in SIFoldOperands backend:AMDGPU llvm:codegen llvm:globalisel
#166600 by AbhayKanhere was merged Nov 8, 2025 Loading…
[AMDGPU] Autogenerate R600 packetizer checks backend:AMDGPU
#166570 by jayfoad was merged Nov 5, 2025 Loading…
[CodeGenPrepare][X86] hasMultipleConditionRegisters - don't sink larger than legal integer comparisons backend:AArch64 backend:AMDGPU backend:PowerPC backend:X86 llvm:codegen
#166564 by RKSimon was closed Nov 10, 2025 Loading…
[AMDGPU] Enable typechecks for __builtin_amdgcn_raw_ptr_buffer_atomic_fadd_v2f16 backend:AMDGPU clang:frontend Language frontend issues, e.g. anything involving "Sema" clang Clang issues not falling into any other category
#166547 by jmmartinez was merged Nov 5, 2025 Loading…
Revert "CodeGen: Record MMOs in finalizeBundle" backend:AMDGPU llvm:codegen llvm:globalisel
#166520 by jplehr was merged Nov 5, 2025 Loading…
AMDGPU: Add and clarify reserved address spaces backend:AMDGPU
#166486 by nhaehnle was merged Nov 5, 2025 Loading…
AMDGPU: Really use AV classes by default for vector classes backend:AMDGPU
#166483 by arsenm was merged Nov 13, 2025 Loading…
AMDGPU: Start to use AV classes for unknown vector class backend:AMDGPU llvm:globalisel
#166482 by arsenm was merged Nov 13, 2025 Loading…
AMDGPU: Relax shouldCoalesce to allow more register tuple widening backend:AMDGPU llvm:globalisel llvm:regalloc
#166475 by arsenm was merged Nov 11, 2025 Loading…
[AMDGPU][LowerBufferFatPointers] Fix crash with
select false backend:AMDGPU #166471 by krzysz00 was merged Nov 5, 2025 Loading…
AMDGPU: Cleanup and modernize limit-coalesce.mir test backend:AMDGPU
#166465 by arsenm was merged Nov 4, 2025 Loading…
[AMDGPU][MC] Disallow nogds in ds_gws_* instructions backend:AMDGPU mc
#166438 by jwanggit86 was closed Nov 18, 2025 Loading…
[NFC][AMDGPU] use DAG.UpdateNodeOperands update chain backend:AMDGPU
#166396 by actinks was merged Nov 4, 2025 Loading…
[llvm] Use conventional enum declarations (NFC) backend:AArch64 backend:AMDGPU backend:ARM backend:MIPS backend:WebAssembly backend:X86 llvm:adt
#166318 by kazutakahirata was merged Nov 4, 2025 Loading…
[AMDGPU] NFC, delete promote-alloca testcase backend:AMDGPU
#166297 by choikwa was merged Nov 4, 2025 Loading…
[AMDGPU][NFC] Avoid copying MachineOperands backend:AMDGPU
#166293 by LU-JOHN was merged Nov 5, 2025 Loading…
[AMDGPU] NFC, move testcase, only test output of promote-alloca with vector-combine backend:AMDGPU llvm:transforms llvm:vectorcombine
#166289 by choikwa was merged Nov 4, 2025 Loading…
[AMDGPU] NFC, fix geps, add vector-combine pass to promote-alloca-array-to-vector test backend:AMDGPU
#166280 by choikwa was closed Nov 4, 2025 Loading…
[Clang][AMDGPU] Fix early exit when finding hip dlls AMDGPUArchByHIP.cpp backend:AMDGPU clang Clang issues not falling into any other category
#166238 by harkgill-amd was merged Nov 10, 2025 Loading…
CodeGen/AMDGPU: Allow 3-address conversion of bundled instructions backend:AMDGPU llvm:codegen
#166213 by nhaehnle was merged Nov 12, 2025 Loading…
CodeGen: Handle bundled instructions in two-address-instructions pass backend:AMDGPU llvm:codegen
#166212 by nhaehnle was merged Nov 6, 2025 Loading…
CodeGen: Record MMOs in finalizeBundle backend:AMDGPU llvm:codegen llvm:globalisel
#166210 by nhaehnle was merged Nov 5, 2025 Loading…
CodeGen: Record tied virtual register operands in finalizeBundle backend:AMDGPU llvm:codegen
#166209 by nhaehnle was merged Nov 5, 2025 Loading…
Reapply: [AMDGPU][UnifyDivergentExitNodes][StructurizeCFG] Add support for callbr instruction with inline-asm (#152161) backend:AMDGPU llvm:transforms
#166195 by ro-i was merged Nov 3, 2025 Loading…
ProTip! no:milestone will show everything without a milestone.