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Pull requests list

Reland "[RegAlloc] Fix the terminal rule check for interfere with DstReg (#168661)" backend:AArch64 backend:AMDGPU backend:Hexagon backend:NVPTX backend:PowerPC backend:RISC-V backend:WebAssembly backend:X86 llvm:codegen llvm:globalisel llvm:regalloc
#169219 by hstk30-hw was merged Nov 24, 2025 Loading…
2
CodeGen: Move libcall lowering configuration to subtarget backend:AArch64 backend:AMDGPU backend:ARM backend:DirectX backend:Hexagon backend:Lanai backend:loongarch backend:MIPS backend:MSP430 backend:NVPTX backend:PowerPC backend:RISC-V backend:Sparc backend:SPIR-V backend:SystemZ backend:WebAssembly backend:X86 backend:Xtensa llvm:codegen llvm:SelectionDAG SelectionDAGISel as well
#168621 by arsenm was merged Nov 25, 2025 Loading…
6
[WebAssembly] Add patterns for extadd pairwise backend:WebAssembly
#167960 by badumbatish was merged Nov 18, 2025 Loading…
5
[NFC][WebAssembly] Precommit test. backend:WebAssembly
#167520 by sparker-arm was merged Nov 11, 2025 Loading…
1
unittests: Convert some tests to opaque pointers backend:WebAssembly llvm:analysis Includes value tracking, cost tables and constant folding llvm:transforms mlgo
#167443 by arsenm was merged Nov 11, 2025 Loading…
6
Remove unused <algorithm> inclusion backend:CSKY backend:WebAssembly backend:X86 clang:openmp OpenMP related changes to Clang flang:openmp llvm:adt llvm:analysis Includes value tracking, cost tables and constant folding llvm:codegen llvm:ir llvm:mc Machine (object) code llvm:support llvm:transforms platform:windows vectorizers xray
#166942 by serge-sans-paille was merged Nov 10, 2025 Loading…
7
[WebAssembly] TableGen-erate SDNode descriptions backend:WebAssembly
#166259 by s-barannikov was merged Nov 5, 2025 Loading…
9
[llvm] Make getEffectiveRelocModel helper consistent across targets. NFC backend:AMDGPU backend:loongarch backend:m68k backend:RISC-V backend:WebAssembly
#165121 by sbc100 was merged Oct 26, 2025 Loading…
3
[Target] Add "override" where appropriate (NFC) backend:AArch64 backend:AMDGPU backend:ARM backend:MIPS backend:RISC-V backend:Sparc backend:SPIR-V backend:SystemZ backend:WebAssembly backend:X86
#165083 by kazutakahirata was merged Oct 25, 2025 Loading…
2
[WebAssembly] vf32 to vi8, vi16 lowering backend:WebAssembly
#164644 by sparker-arm was merged Nov 6, 2025 Loading…
@sparker-arm
3
[WebAssembly] Implement more of getCastInstrCost backend:WebAssembly llvm:transforms
#164612 by sparker-arm was merged Nov 10, 2025 Loading…
@sparker-arm
10
[NFC][WebAssembly] FP conversion interleave tests backend:WebAssembly llvm:transforms
#164576 by sparker-arm was merged Oct 22, 2025 Loading…
2
[ADT] Migrate StringSwitch Cases with 6+ arguments to new overload. NFC. backend:RISC-V backend:WebAssembly backend:X86 clang:driver 'clang' and 'clang++' user-facing binaries. Not 'clang-cl' clang:frontend Language frontend issues, e.g. anything involving "Sema" clang:static analyzer clang Clang issues not falling into any other category lldb llvm:binary-utilities skip-precommit-approval PR for CI feedback, not intended for review tablegen
#163549 by kuhar was merged Oct 15, 2025 Loading…
2
[ADT] Mark StringSwitch Cases with 6+ arguments as deprecated. NFC. backend:RISC-V backend:WebAssembly backend:X86 clang:driver 'clang' and 'clang++' user-facing binaries. Not 'clang-cl' clang:frontend Language frontend issues, e.g. anything involving "Sema" clang:static analyzer clang Clang issues not falling into any other category lldb llvm:adt llvm:binary-utilities tablegen
#163405 by kuhar was merged Oct 15, 2025 Loading…
15
[WebAssembly] [Codegen] Add patterns for relaxed dot backend:WebAssembly
#163266 by badumbatish was merged Oct 16, 2025 Loading…
10
Revert "[WebAssembly] Lower fmuladd to madd and nmadd" backend:WebAssembly llvm:codegen llvm:SelectionDAG SelectionDAGISel as well
#163171 by sparker-arm was merged Oct 13, 2025 Loading…
1
[WebAssembly] [Codegen] Add pattern for relaxed min max from fminimum/fmaximum over v4f32 and v2f64 backend:WebAssembly
#162948 by badumbatish was merged Oct 22, 2025 Loading…
7
RegisterCoalescer: Enable terminal rule by default for AMDGPU backend:AArch64 backend:AMDGPU backend:Hexagon backend:NVPTX backend:PowerPC backend:RISC-V backend:SystemZ backend:WebAssembly backend:X86 llvm:codegen llvm:globalisel llvm:regalloc llvm:transforms
#161621 by arsenm was merged Nov 10, 2025 Loading…
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[WebAssembly] Lower fmuladd to madd and nmadd backend:WebAssembly llvm:codegen llvm:SelectionDAG SelectionDAGISel as well
#161355 by sparker-arm was merged Oct 13, 2025 Loading…
@sparker-arm
35
[WebAssembly] Use partial_reduce_mla ISD nodes backend:WebAssembly
#161184 by sparker-arm was merged Sep 30, 2025 Loading…
@sparker-arm
3
CodeGen: Make all targets override pseudos with pointers backend:AArch64 backend:AMDGPU backend:ARM backend:CSKY backend:DirectX backend:Hexagon backend:Lanai backend:loongarch backend:m68k backend:MIPS backend:MSP430 backend:NVPTX backend:PowerPC backend:RISC-V backend:Sparc backend:SPIR-V backend:SystemZ backend:WebAssembly backend:X86 backend:Xtensa llvm:codegen llvm:globalisel llvm:mc Machine (object) code llvm:SelectionDAG SelectionDAGISel as well tablegen
#159881 by arsenm was merged Nov 26, 2025 Loading…
10
[WebAssembly] Require tags for Wasm EH and Wasm SJLJ to be defined externally backend:WebAssembly compiler-rt:builtins compiler-rt lld:wasm lld llvm:codegen
#159143 by sbc100 was merged Sep 19, 2025 Loading…
21
MC: Better handle backslash-escaped symbols backend:WebAssembly backend:X86 llvm:mc Machine (object) code
#158780 by MaskRay was merged Sep 16, 2025 Loading… LLVM 21.x Release
9
CodeGen: Remove TRI arguments from stack load/store hooks backend:AArch64 backend:AMDGPU backend:ARC backend:ARM backend:CSKY backend:DirectX backend:Hexagon backend:Lanai backend:loongarch backend:MIPS backend:MSP430 backend:NVPTX backend:PowerPC backend:RISC-V backend:Sparc backend:SPIR-V backend:SystemZ backend:WebAssembly backend:X86 backend:Xtensa llvm:codegen llvm:globalisel llvm:regalloc llvm:SelectionDAG SelectionDAGISel as well tablegen
#158240 by arsenm was merged Nov 11, 2025 Loading…
7
CodeGen: Remove MachineFunction argument from getPointerRegClass backend:AArch64 backend:AMDGPU backend:ARM backend:Hexagon backend:loongarch backend:MIPS backend:MSP430 backend:PowerPC backend:RISC-V backend:Sparc backend:SystemZ backend:WebAssembly backend:X86 llvm:codegen llvm:globalisel
#158185 by arsenm was merged Sep 12, 2025 Loading…
12
ProTip! Updated in the last three days: updated:>2025-11-29.