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Pull requests: llvm/llvm-project
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[CodeGenTypes] Remove explicit VT numbers from ValueTypes.td backend:SPIR-V mlir:core MLIR Core Infrastructure mlir:llvm mlir tablegen
#169670 by jayfoad was merged Nov 27, 2025 Loading…
[SPIRV] Add legalization for long vectors backend:SPIR-V llvm:globalisel
#169665 by s-perron was merged Dec 1, 2025 Loading…
[SPIRV][AMD] Disable SPV_KHR_float_control2 for AMD flavored SPIRV backend:SPIR-V
#169659 by jmmartinez was merged Nov 27, 2025 Loading…
[SPIRV] Use OpCopyMemory for logical SPIRV memcpy backend:SPIR-V
#169348 by s-perron was merged Nov 26, 2025 Loading…
[SPIRV] Use range-based for loops (NFC) backend:SPIR-V
#169241 by kazutakahirata was merged Nov 24, 2025 Loading…
[SPIRV] Error in backend for vararg functions backend:SPIR-V
#169111 by sarnex was merged Nov 25, 2025 Loading…
[SPIRV] Support Peeled Array Layouts for HLSL CBuffers backend:SPIR-V
#169078 by s-perron was merged Nov 26, 2025 Loading…
[SPIRV] Improve Logical SPIR-V Pointer Access and GEP Legalization backend:SPIR-V
#169076 by s-perron was merged Nov 26, 2025 Loading…
[HLSL][SPIR-V] Implements SV_Position for VS/PS I/O backend:SPIR-V clang:codegen IR generation bugs: mangling, exceptions, etc. clang:frontend Language frontend issues, e.g. anything involving "Sema" HLSL HLSL Language Support
#168735 by Keenuts was merged Nov 24, 2025 Loading…
[llvm] Use llvm::size (NFC) backend:AArch64 backend:AMDGPU backend:SPIR-V llvm:support llvm:transforms objectyaml tablegen vectorizers xray
#168675 by kazutakahirata was merged Nov 19, 2025 Loading…
CodeGen: Move libcall lowering configuration to subtarget backend:AArch64 backend:AMDGPU backend:ARM backend:DirectX backend:Hexagon backend:Lanai backend:loongarch backend:MIPS backend:MSP430 backend:NVPTX backend:PowerPC backend:RISC-V backend:Sparc backend:SPIR-V backend:SystemZ backend:WebAssembly backend:X86 backend:Xtensa llvm:codegen llvm:SelectionDAG SelectionDAGISel as well
#168621 by arsenm was merged Nov 25, 2025 Loading…
CodeGen: Add subtarget to TargetLoweringBase constructor backend:AArch64 backend:AMDGPU backend:ARM backend:DirectX backend:Hexagon backend:Lanai backend:loongarch backend:MIPS backend:MSP430 backend:NVPTX backend:PowerPC backend:RISC-V backend:Sparc backend:SPIR-V backend:SystemZ backend:WebAssembly backend:X86 backend:Xtensa llvm:codegen llvm:SelectionDAG SelectionDAGISel as well
#168620 by arsenm was merged Nov 19, 2025 Loading…
[SPIRV] Enable DCE in instruction selection and update tests backend:SPIR-V
#168428 by s-perron was merged Nov 26, 2025 Loading…
[llvm] Proofread *.rst backend:AMDGPU backend:SPIR-V llvm:ir
#168254 by kazutakahirata was merged Nov 16, 2025 Loading…
[SPIRV] Use MCRegister instead of unsigned. NFC backend:SPIR-V
#167585 by topperc was merged Nov 11, 2025 Loading…
[HLSL][DirectX] Use a padding type for HLSL buffers. backend:DirectX backend:SPIR-V clang:codegen IR generation bugs: mangling, exceptions, etc. clang Clang issues not falling into any other category HLSL HLSL Language Support llvm:ir
#167404 by bogner was merged Nov 18, 2025 Loading…
[clang][SPIRV] Don't addrspacecast nullptr for function pointer types backend:SPIR-V clang:codegen IR generation bugs: mangling, exceptions, etc. clang Clang issues not falling into any other category
#167379 by sarnex was merged Nov 11, 2025 Loading…
Reland "[clang] Refactor option-related code from clangDriver into new clangOptions library" (#167348) backend:AArch64 backend:AMDGPU backend:ARM backend:CSKY backend:Hexagon backend:loongarch backend:MIPS backend:PowerPC backend:RISC-V backend:Sparc backend:SPIR-V backend:SystemZ backend:X86 bazel "Peripheral" support tier build system: utils/bazel clang:driver 'clang' and 'clang++' user-facing binaries. Not 'clang-cl' clang:frontend Language frontend issues, e.g. anything involving "Sema" clang:openmp OpenMP related changes to Clang clang Clang issues not falling into any other category clang-tools-extra clangd flang:driver flang Flang issues not falling into any other category lldb llvm:mc Machine (object) code
#167374 by naveen-seth was merged Nov 10, 2025 Loading…
Revert "[clang] Refactor option-related code from clangDriver into new clangOptions library" backend:AArch64 backend:AMDGPU backend:ARM backend:CSKY backend:Hexagon backend:loongarch backend:MIPS backend:PowerPC backend:RISC-V backend:Sparc backend:SPIR-V backend:SystemZ backend:X86 bazel "Peripheral" support tier build system: utils/bazel clang:driver 'clang' and 'clang++' user-facing binaries. Not 'clang-cl' clang:frontend Language frontend issues, e.g. anything involving "Sema" clang:openmp OpenMP related changes to Clang clang Clang issues not falling into any other category clang-tools-extra clangd flang:driver flang Flang issues not falling into any other category lldb llvm:mc Machine (object) code
#167348 by naveen-seth was merged Nov 10, 2025 Loading…
Remove unused standard header inclusion: <iterator>, <utility>, <type_traits> backend:AArch64 backend:AMDGPU backend:ARM backend:Hexagon backend:NVPTX backend:RISC-V backend:SPIR-V backend:SystemZ backend:X86 debuginfo llvm:adt llvm:analysis Includes value tracking, cost tables and constant folding llvm:binary-utilities llvm:codegen llvm:instcombine Covers the InstCombine, InstSimplify and AggressiveInstCombine passes llvm:ir llvm:mc Machine (object) code llvm:regalloc llvm:support llvm:transforms PGO Profile Guided Optimizations platform:windows tablegen tools:llvm-exegesis xray
#167318 by serge-sans-paille was closed Nov 11, 2025 Loading…
Remove unused standard headers: memory, unordered_* backend:AArch64 backend:DirectX backend:Hexagon backend:m68k backend:MIPS backend:PowerPC backend:RISC-V backend:Sparc backend:SPIR-V backend:X86 debuginfo llvm:adt llvm:analysis Includes value tracking, cost tables and constant folding llvm:binary-utilities llvm:codegen llvm:ir llvm:mc Machine (object) code llvm:support llvm:transforms mlgo objectyaml PGO Profile Guided Optimizations platform:windows tablegen tools:llvm-exegesis tools:llvm-mca xray
#167297 by serge-sans-paille was merged Nov 12, 2025 Loading…
[HLSL][SPIRV] Add error test for unpackhalf2x16 backend:SPIR-V
#166969 by tcorringham was merged Nov 10, 2025 Loading…
[SPIRV][SPIRVPrepareGlobals] Map AMD's dynamic LDS 0-element globals to arrays with UINT32_MAX elements backend:SPIR-V
#166952 by jmmartinez was merged Nov 12, 2025 Loading…
[SPIRV][SPIRVPrepareGlobals] Convert llvm.embedded.module from a 0-element array to a 1-element array backend:SPIR-V
#166950 by jmmartinez was merged Nov 12, 2025 Loading…
[NFC][SPIRV] Make the zero-length-array.ll test explicit about what is generated backend:SPIR-V
#166910 by jmmartinez was merged Nov 10, 2025 Loading…
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