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Pull requests: llvm/llvm-project
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Replace llvm.memcpy et al's i1 isVolatile with i8 VolFlags backend:AArch64 backend:AMDGPU backend:ARM backend:loongarch backend:MSP430 backend:RISC-V backend:Sparc backend:WebAssembly backend:X86 clang:codegen IR generation bugs: mangling, exceptions, etc. clang Clang issues not falling into any other category debuginfo flang:driver flang:fir-hlfir flang:openmp flang Flang issues not falling into any other category llvm:analysis Includes value tracking, cost tables and constant folding llvm:globalisel llvm:ir llvm:SelectionDAG SelectionDAGISel as well llvm:support llvm:transforms mlir:llvm mlir:spirv mlir PGO Profile Guided Optimizations
#65748 opened Sep 8, 2023 by urnathan Loading…
[SDag] Notify listeners when deleting a node backend:AMDGPU backend:X86 llvm:SelectionDAG SelectionDAGISel as well
#66991 opened Sep 21, 2023 by s-barannikov • Draft
[DAGCombiner] Combine frem into fdiv+ftrunc+fma backend:AArch64 backend:PowerPC backend:X86 llvm:SelectionDAG SelectionDAGISel as well
#67642 opened Sep 28, 2023 by ecnelises Loading…
[CodeGen] Sort .ctors in reverse on MinGW just like on other platforms backend:X86 llvm:codegen llvm:mc Machine (object) code platform:windows
#68570 opened Oct 9, 2023 by mstorsjo Loading…
[IR] Add intrinsics to represent complex multiply and divide operations backend:AArch64 backend:AMDGPU backend:ARM backend:loongarch backend:X86 llvm:ir llvm:SelectionDAG SelectionDAGISel as well
#68742 opened Oct 10, 2023 by jcranmer-intel Loading…
Reapply inline spiller subranges backend:AMDGPU backend:X86 llvm:regalloc
#70194 opened Oct 25, 2023 by arsenm Loading…
[NewPM][CodeGen] add TargetPassConfig like API backend:X86
#70906 opened Nov 1, 2023 by paperchalice Loading…
[RFC] Introducing IR generation bugs: mangling, exceptions, etc. clang:dataflow Clang Dataflow Analysis framework - https://clang.llvm.org/docs/DataFlowAnalysisIntro.html clang:frontend Language frontend issues, e.g. anything involving "Sema" clang:static analyzer clang Clang issues not falling into any other category llvm:ir llvm:SelectionDAG SelectionDAGISel as well llvm:transforms
__builtin_consistent to generate AArch64 BC.cond … backend:AArch64 backend:ARM backend:loongarch backend:m68k backend:MSP430 backend:RISC-V backend:Sparc backend:SPIR-V backend:WebAssembly backend:X86 clang:analysis clang:codegen #72175 opened Nov 14, 2023 by ilinpv Loading…
[RISCV] Add macro fusions for Xiangshan backend:AArch64 backend:AMDGPU backend:ARM backend:RISC-V backend:X86 llvm:mc Machine (object) code
#72362 opened Nov 15, 2023 by wangpc-pp Loading…
[CUDA][Win32] Add Headers provided by Clang, e.g. for intrinsics clang Clang issues not falling into any other category
fma(long double,..) to math forward declares. backend:X86 clang:headers #73756 opened Nov 29, 2023 by fodinabor Loading…
[GlobalISel] Remove dead VRegs after instruction selection backend:AArch64 backend:X86 debuginfo llvm:globalisel
#73892 opened Nov 30, 2023 by e-kud Loading…
[llvm] Change IR generation bugs: mangling, exceptions, etc. clang Clang issues not falling into any other category llvm:adt llvm:analysis Includes value tracking, cost tables and constant folding llvm:ir llvm:SelectionDAG SelectionDAGISel as well llvm:support
fp128 lowering to use f128 functions by default backend:AArch64 backend:ARM backend:Hexagon backend:MIPS backend:PowerPC backend:SystemZ backend:WebAssembly backend:X86 clang:codegen #76558 opened Dec 29, 2023 by tgross35 Loading…
Move ExpandMemCmp and MergeIcmp to the middle end backend:AArch64 backend:AMDGPU backend:ARM backend:loongarch backend:m68k backend:X86 llvm:transforms
#77370 opened Jan 8, 2024 by gbaraldi Loading…
[X86] Add support for indirect branch tracking in jump tables backend:X86
#77679 opened Jan 10, 2024 by nmosier Loading…
[clang] Support per-function [[clang::code_align(N)]] attribute. backend:X86 clang:codegen IR generation bugs: mangling, exceptions, etc. clang:frontend Language frontend issues, e.g. anything involving "Sema" clang Clang issues not falling into any other category
#80765 opened Feb 5, 2024 by AntonBikineev Loading…
[X86][GlobalISel] Enable G_BRJT backend:X86 llvm:globalisel
#81811 opened Feb 15, 2024 by RemiSEGARD Loading…
[TableGen] Fix regunit superset calculation backend:AArch64 backend:X86 tablegen
#81850 opened Feb 15, 2024 by jayfoad Loading…
[X86][ArgPromotion] Do not assume large vectors or aggregates ABI compatible backend:X86 llvm:transforms
#84105 opened Mar 6, 2024 by phoebewang Loading…
Add a pass to calculate machine function's cfg hash to detect whether… backend:X86
#84145 opened Mar 6, 2024 by lifengxiang1025 Loading…
[LegalizeTypes][X86][PowerPC] Use shift by 1 instead of adding a value to itself to double. backend:PowerPC backend:X86 llvm:SelectionDAG SelectionDAGISel as well
#86857 opened Mar 27, 2024 by topperc Loading…
[X86] Prefer andl to andb to save one byte encoding when using with bzhi or bextr backend:X86
#86921 opened Mar 28, 2024 by phoebewang Loading…
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